Hardware design of an adaptive neuro-fuzzy network with on-chip learning capability

Tzu Ping Kao, Chun Chang Yu, Ting Yu Chen, Jeen Shing Wang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

This paper aims for the development of the digital circuit of an adaptive neuro-fuzzy network with on-chip learning capability. The on-chip learning capability was realized by a backpropagation learning circuit for optimizing the network parameters. To maximize the throughput of the circuit and minimize its required resources, we proposed to reuse the computational results in both feedforward and backpropagation circuits. This leads to a simpler data flow and the reduction of resource consumption. To verify the effectiveness of the circuit, we implemented the circuit in an FPGA development board and compared the performance with the neuro-fuzzy system written in a MATLAB® code. The experimental results show that the throughput of our neuro-fuzzy circuit significantly outperforms the NF network written in a MATLAB® code with a satisfactory learning performance.

Original languageEnglish
Title of host publicationAdvances in Neural Networks - ISNN 2007 - 4th International Symposium on Neural Networks, ISNN 2007, Proceedings
PublisherSpringer Verlag
Pages336-345
Number of pages10
EditionPART 2
ISBN (Print)9783540723929
DOIs
Publication statusPublished - 2007
Event4th International Symposium on Neural Networks, ISNN 2007 - Nanjing, China
Duration: 2007 Jun 32007 Jun 7

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
NumberPART 2
Volume4492 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Other

Other4th International Symposium on Neural Networks, ISNN 2007
Country/TerritoryChina
CityNanjing
Period07-06-0307-06-07

All Science Journal Classification (ASJC) codes

  • Theoretical Computer Science
  • Computer Science(all)

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