Hardware/software codesign of resource constrained real-time systems

Chia Cheng Lo, Jung Guan Luo, Ming Der Shieh

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

System-level design methods can provide a systematic and effective way of evaluating various design options, thus shortening the product development time. This paper relaxes the HC algorithm by considering the K best candidates in each clustering iteration to alleviate the possibility of being trapped in local minimum during hardware/software (HW/SW) partition. We also present an architecture mapping algorithm together with the defined sensitivity measure to further reduce the hardware requirement. Simulation results show that the complexity of exploration time can be greatly reduced with only little performance loss as compared to the exhaustive search. The proposed algorithm can thus provide a good compromise between exploration time and accuracy.

Original languageEnglish
Title of host publication5th International Conference on Information Assurance and Security, IAS 2009
Pages177-180
Number of pages4
DOIs
Publication statusPublished - 2009 Dec 1
Event5th International Conference on Information Assurance and Security, IAS 2009 - Xian, China
Duration: 2009 Aug 182009 Sep 20

Publication series

Name5th International Conference on Information Assurance and Security, IAS 2009
Volume1

Other

Other5th International Conference on Information Assurance and Security, IAS 2009
CountryChina
CityXian
Period09-08-1809-09-20

All Science Journal Classification (ASJC) codes

  • Computational Theory and Mathematics
  • Computer Science Applications
  • Hardware and Architecture
  • Software

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