High-aspect-ratio Sub-2-μm vias using thermal imprint with build-up resin

Takumi Kamibayashi; Hiroyuki Kuwae; Takahiro Kishioka; Yuki Usui; Takuya Ohashi; Mamoru Tamura; Shuichi Shoji; Jun Mizuno

doi:10.1109/IMPACT.2018.8625825

High-aspect-ratio Sub-2-μm vias using thermal imprint with build-up resin

Takumi Kamibayashi
, Hiroyuki Kuwae
, Takahiro Kishioka
, Yuki Usui
, Takuya Ohashi
, Mamoru Tamura
, Shuichi Shoji
, Jun Mizuno

Program on Smart and Sustainable Manufacturing

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

We developed a fabrication method of high-aspect-ratio fine vias with a build-up resin. The build-up resin composed of a thermosetting resin and silica fillers has low coefficient of thermal expansion and low dielectric constant. Thermal imprint was performed to form the high-aspect-ratio fine via holes on the build-up resin. The imprint mold with high-aspect-ratio fine pillar patterns was fabricated by photolithography and deep reactive ion etching. The residual layer consisted of the thermosetting resin and the silica filler was removed by O₂/CHF₃ plasma etching. The via of 1.2 μm in diameter with aspect ratio of 5.5, and 5.0 μm in pitch was successfully fabricated followed by Au electroplating. The proposed fabrication method is applicable for high-density 3-dimensional and 2.5-dimensional integration technologies.

Original language	English
Title of host publication	13th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2018
Publisher	IEEE Computer Society
Pages	115-118
Number of pages	4
ISBN (Electronic)	9781538656150
DOIs	https://doi.org/10.1109/IMPACT.2018.8625825
Publication status	Published - 2018 Jul 2
Event	13th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2018 - Taipei, Taiwan Duration: 2018 Oct 24 → 2018 Oct 26

Publication series

Name	Proceedings of Technical Papers - International Microsystems, Packaging, Assembly, and Circuits Technology Conference, IMPACT
Volume	2018-October
ISSN (Print)	2150-5934
ISSN (Electronic)	2150-5942

Conference

Conference	13th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2018
Country/Territory	Taiwan
City	Taipei
Period	18-10-24 → 18-10-26

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Control and Systems Engineering
Electrical and Electronic Engineering

Access to Document

10.1109/IMPACT.2018.8625825

Cite this

Kamibayashi, T., Kuwae, H., Kishioka, T., Usui, Y., Ohashi, T., Tamura, M., Shoji, S., & Mizuno, J. (2018). High-aspect-ratio Sub-2-μm vias using thermal imprint with build-up resin. In 13th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2018 (pp. 115-118). Article 8625825 (Proceedings of Technical Papers - International Microsystems, Packaging, Assembly, and Circuits Technology Conference, IMPACT; Vol. 2018-October). IEEE Computer Society. https://doi.org/10.1109/IMPACT.2018.8625825

Kamibayashi, Takumi ; Kuwae, Hiroyuki ; Kishioka, Takahiro et al. / High-aspect-ratio Sub-2-μm vias using thermal imprint with build-up resin. 13th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2018. IEEE Computer Society, 2018. pp. 115-118 (Proceedings of Technical Papers - International Microsystems, Packaging, Assembly, and Circuits Technology Conference, IMPACT).

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title = "High-aspect-ratio Sub-2-μm vias using thermal imprint with build-up resin",

abstract = "We developed a fabrication method of high-aspect-ratio fine vias with a build-up resin. The build-up resin composed of a thermosetting resin and silica fillers has low coefficient of thermal expansion and low dielectric constant. Thermal imprint was performed to form the high-aspect-ratio fine via holes on the build-up resin. The imprint mold with high-aspect-ratio fine pillar patterns was fabricated by photolithography and deep reactive ion etching. The residual layer consisted of the thermosetting resin and the silica filler was removed by O2/CHF3 plasma etching. The via of 1.2 μm in diameter with aspect ratio of 5.5, and 5.0 μm in pitch was successfully fabricated followed by Au electroplating. The proposed fabrication method is applicable for high-density 3-dimensional and 2.5-dimensional integration technologies.",

author = "Takumi Kamibayashi and Hiroyuki Kuwae and Takahiro Kishioka and Yuki Usui and Takuya Ohashi and Mamoru Tamura and Shuichi Shoji and Jun Mizuno",

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doi = "10.1109/IMPACT.2018.8625825",

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Kamibayashi, T, Kuwae, H, Kishioka, T, Usui, Y, Ohashi, T, Tamura, M, Shoji, S & Mizuno, J 2018, High-aspect-ratio Sub-2-μm vias using thermal imprint with build-up resin. in 13th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2018., 8625825, Proceedings of Technical Papers - International Microsystems, Packaging, Assembly, and Circuits Technology Conference, IMPACT, vol. 2018-October, IEEE Computer Society, pp. 115-118, 13th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2018, Taipei, Taiwan, 18-10-24. https://doi.org/10.1109/IMPACT.2018.8625825

High-aspect-ratio Sub-2-μm vias using thermal imprint with build-up resin. / Kamibayashi, Takumi; Kuwae, Hiroyuki; Kishioka, Takahiro et al.
13th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2018. IEEE Computer Society, 2018. p. 115-118 8625825 (Proceedings of Technical Papers - International Microsystems, Packaging, Assembly, and Circuits Technology Conference, IMPACT; Vol. 2018-October).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - High-aspect-ratio Sub-2-μm vias using thermal imprint with build-up resin

AU - Kamibayashi, Takumi

AU - Kuwae, Hiroyuki

AU - Kishioka, Takahiro

AU - Usui, Yuki

AU - Ohashi, Takuya

AU - Tamura, Mamoru

AU - Shoji, Shuichi

AU - Mizuno, Jun

PY - 2018/7/2

Y1 - 2018/7/2

N2 - We developed a fabrication method of high-aspect-ratio fine vias with a build-up resin. The build-up resin composed of a thermosetting resin and silica fillers has low coefficient of thermal expansion and low dielectric constant. Thermal imprint was performed to form the high-aspect-ratio fine via holes on the build-up resin. The imprint mold with high-aspect-ratio fine pillar patterns was fabricated by photolithography and deep reactive ion etching. The residual layer consisted of the thermosetting resin and the silica filler was removed by O2/CHF3 plasma etching. The via of 1.2 μm in diameter with aspect ratio of 5.5, and 5.0 μm in pitch was successfully fabricated followed by Au electroplating. The proposed fabrication method is applicable for high-density 3-dimensional and 2.5-dimensional integration technologies.

AB - We developed a fabrication method of high-aspect-ratio fine vias with a build-up resin. The build-up resin composed of a thermosetting resin and silica fillers has low coefficient of thermal expansion and low dielectric constant. Thermal imprint was performed to form the high-aspect-ratio fine via holes on the build-up resin. The imprint mold with high-aspect-ratio fine pillar patterns was fabricated by photolithography and deep reactive ion etching. The residual layer consisted of the thermosetting resin and the silica filler was removed by O2/CHF3 plasma etching. The via of 1.2 μm in diameter with aspect ratio of 5.5, and 5.0 μm in pitch was successfully fabricated followed by Au electroplating. The proposed fabrication method is applicable for high-density 3-dimensional and 2.5-dimensional integration technologies.

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BT - 13th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2018

PB - IEEE Computer Society

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Y2 - 24 October 2018 through 26 October 2018

ER -

Kamibayashi T, Kuwae H, Kishioka T, Usui Y, Ohashi T, Tamura M et al. High-aspect-ratio Sub-2-μm vias using thermal imprint with build-up resin. In 13th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2018. IEEE Computer Society. 2018. p. 115-118. 8625825. (Proceedings of Technical Papers - International Microsystems, Packaging, Assembly, and Circuits Technology Conference, IMPACT). doi: 10.1109/IMPACT.2018.8625825

High-aspect-ratio Sub-2-μm vias using thermal imprint with build-up resin

Abstract

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All Science Journal Classification (ASJC) codes

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