High performance OTFT with a hybrid nanocomposite insulator

Wen-Shi Lee, J. J. Wang, W. T. Chen, J. C. Ho, T. Hu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A strategy for high-performance OTFT gate insulators is a multi-layer structure. The composite insulator adjacent to pentacene minimized trapping at the interface and exhibits performance including on-off current ratio of about 105, threshold voltage of -10V and mobility of 0.15cm 2V-1s-1.

Original languageEnglish
Title of host publicationIDMC 2007 - International Display Manufacturing Conference and FPD Expo - Proceedings
Pages551-553
Number of pages3
Publication statusPublished - 2007 Dec 1
EventInternational Display Manufacturing Conference and Exhibition, IDMC 2007 - Taipei, Taiwan
Duration: 2007 Jul 32007 Jul 6

Publication series

NameIDMC 2007 - International Display Manufacturing Conference and FPD Expo - Proceedings

Other

OtherInternational Display Manufacturing Conference and Exhibition, IDMC 2007
CountryTaiwan
CityTaipei
Period07-07-0307-07-06

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Industrial and Manufacturing Engineering
  • Electronic, Optical and Magnetic Materials

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  • Cite this

    Lee, W-S., Wang, J. J., Chen, W. T., Ho, J. C., & Hu, T. (2007). High performance OTFT with a hybrid nanocomposite insulator. In IDMC 2007 - International Display Manufacturing Conference and FPD Expo - Proceedings (pp. 551-553). (IDMC 2007 - International Display Manufacturing Conference and FPD Expo - Proceedings).