We investigate techniques for speeding up the compaction simulation of a single-input signature register based on its equivalent multiple-input implementation. Our approach is to systematically decompose the original input sequence into a set of subsequences based on the theory of finite field. High-speed signature computations can then be achieved by inputting those subsequences at the same time and employing the lookahead technique for those subsequences to speed up compaction. Both the internal-XOR and external-XOR LFSRs are implemented to demonstrate the flexibility of our development. Compared with the existing methods that were mainly developed for software programming, our results are suitable for both software and hardware implementation and have the potential of reducing the memory requirement of off-line determination of signatures.
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering