TY - JOUR
T1 - Impact of SiN on performance in novel complementary metal-oxide- semiconductor architecture using substrate strained-SiGe and mechanical strained-Si technology
AU - Lin, Chung Hsiung
AU - Wu, San Lein
AU - Wu, Chung Yi
AU - Kang, Ting Kuo
AU - Huang, Kuang Chih
AU - Chang, Shoou Jinn
PY - 2007/5/8
Y1 - 2007/5/8
N2 - In this paper, we report the fabrication of a SiN-induced mechanically tensile-strained Si n-type metal-oxide-semiconductor field-effect transistor (nMOSFET) and a compressively strained SiGe p-type MOSFET to improve the drive current of both n-and pMOSFETs simultaneously, and we integrated both devices on the same wafer. Individual MOSFET performance can be adjusted independently to their optimum levels due to the separation process for two types of devices. It is found that n- and pMOSFETs in the novel complementary metal-oxide- semiconductor (CMOS) architecture had a better performance, not only a higher drain-to-source saturation current but also a higher transconductance with wide gate voltage swing, than the Si devices used as a control. Although a degraded performance was found in the pMOSFET with a SiN layer, this effect can be minimized by increasing the Ge content in the Si1-xGex conducting channel, thus demonstrating that the flow has a great flexibility for developing a next-generation high-performance CMOS devices.
AB - In this paper, we report the fabrication of a SiN-induced mechanically tensile-strained Si n-type metal-oxide-semiconductor field-effect transistor (nMOSFET) and a compressively strained SiGe p-type MOSFET to improve the drive current of both n-and pMOSFETs simultaneously, and we integrated both devices on the same wafer. Individual MOSFET performance can be adjusted independently to their optimum levels due to the separation process for two types of devices. It is found that n- and pMOSFETs in the novel complementary metal-oxide- semiconductor (CMOS) architecture had a better performance, not only a higher drain-to-source saturation current but also a higher transconductance with wide gate voltage swing, than the Si devices used as a control. Although a degraded performance was found in the pMOSFET with a SiN layer, this effect can be minimized by increasing the Ge content in the Si1-xGex conducting channel, thus demonstrating that the flow has a great flexibility for developing a next-generation high-performance CMOS devices.
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U2 - 10.1143/JJAP.46.2882
DO - 10.1143/JJAP.46.2882
M3 - Article
AN - SCOPUS:34547905083
SN - 0021-4922
VL - 46
SP - 2882
EP - 2886
JO - Japanese Journal of Applied Physics
JF - Japanese Journal of Applied Physics
IS - 5 A
ER -