Impact of SiN on performance in novel complementary metal-oxide- semiconductor architecture using substrate strained-SiGe and mechanical strained-Si technology

Chung Hsiung Lin, San Lein Wu, Chung Yi Wu, Ting Kuo Kang, Kuang Chih Huang, Shoou Jinn Chang

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)

Abstract

In this paper, we report the fabrication of a SiN-induced mechanically tensile-strained Si n-type metal-oxide-semiconductor field-effect transistor (nMOSFET) and a compressively strained SiGe p-type MOSFET to improve the drive current of both n-and pMOSFETs simultaneously, and we integrated both devices on the same wafer. Individual MOSFET performance can be adjusted independently to their optimum levels due to the separation process for two types of devices. It is found that n- and pMOSFETs in the novel complementary metal-oxide- semiconductor (CMOS) architecture had a better performance, not only a higher drain-to-source saturation current but also a higher transconductance with wide gate voltage swing, than the Si devices used as a control. Although a degraded performance was found in the pMOSFET with a SiN layer, this effect can be minimized by increasing the Ge content in the Si1-xGex conducting channel, thus demonstrating that the flow has a great flexibility for developing a next-generation high-performance CMOS devices.

Original languageEnglish
Pages (from-to)2882-2886
Number of pages5
JournalJapanese Journal of Applied Physics
Volume46
Issue number5 A
DOIs
Publication statusPublished - 2007 May 8

All Science Journal Classification (ASJC) codes

  • General Engineering
  • General Physics and Astronomy

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