Improvements of quasi-cyclic low-density parity-check codes based on hybrid structures of BIBD's schemes

Chao Chin Yang, Jen-Fa Huan, Ta Chun Nieh, Chun Ming Huang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, we propose a simple mathematical structure to improve the BER (bit error rate) performance of quasi-cyclic low-density parity-check (QC-LDPC) codes. Since the proposed structure can be defined in-between those of random codes and structured codes, these proposed QC-LDPC codes not only perform as well as random-LDPC codes, but also preserve the advantage of structured LDPC codes which is easier to implement over coding hardware. Moreover, the proposed structure, constructed from balanced incomplete block design (BIBD), can reduce the density of parity-check matrix and hence reduce the number of short cycles, which generally lead to better performance. At the end, we show that the error floor performance of QC-LDPC codes can be improved by proposed hybrid structures and perform well over binary-input additive white Gaussian noise (BI-AWGN) channel.

Original languageEnglish
Title of host publication2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012
Pages132-135
Number of pages4
DOIs
Publication statusPublished - 2012 Dec 1
Event2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012 - Kaohsiung, Taiwan
Duration: 2012 Dec 22012 Dec 5

Publication series

NameIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Other

Other2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012
CountryTaiwan
CityKaohsiung
Period12-12-0212-12-05

Fingerprint

Bit error rate
Hardware

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Yang, C. C., Huan, J-F., Nieh, T. C., & Huang, C. M. (2012). Improvements of quasi-cyclic low-density parity-check codes based on hybrid structures of BIBD's schemes. In 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012 (pp. 132-135). [6418989] (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS). https://doi.org/10.1109/APCCAS.2012.6418989
Yang, Chao Chin ; Huan, Jen-Fa ; Nieh, Ta Chun ; Huang, Chun Ming. / Improvements of quasi-cyclic low-density parity-check codes based on hybrid structures of BIBD's schemes. 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012. 2012. pp. 132-135 (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS).
@inproceedings{7cacb5c04ef543e38854d0c02ccc9e7b,
title = "Improvements of quasi-cyclic low-density parity-check codes based on hybrid structures of BIBD's schemes",
abstract = "In this paper, we propose a simple mathematical structure to improve the BER (bit error rate) performance of quasi-cyclic low-density parity-check (QC-LDPC) codes. Since the proposed structure can be defined in-between those of random codes and structured codes, these proposed QC-LDPC codes not only perform as well as random-LDPC codes, but also preserve the advantage of structured LDPC codes which is easier to implement over coding hardware. Moreover, the proposed structure, constructed from balanced incomplete block design (BIBD), can reduce the density of parity-check matrix and hence reduce the number of short cycles, which generally lead to better performance. At the end, we show that the error floor performance of QC-LDPC codes can be improved by proposed hybrid structures and perform well over binary-input additive white Gaussian noise (BI-AWGN) channel.",
author = "Yang, {Chao Chin} and Jen-Fa Huan and Nieh, {Ta Chun} and Huang, {Chun Ming}",
year = "2012",
month = "12",
day = "1",
doi = "10.1109/APCCAS.2012.6418989",
language = "English",
isbn = "9781457717291",
series = "IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS",
pages = "132--135",
booktitle = "2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012",

}

Yang, CC, Huan, J-F, Nieh, TC & Huang, CM 2012, Improvements of quasi-cyclic low-density parity-check codes based on hybrid structures of BIBD's schemes. in 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012., 6418989, IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS, pp. 132-135, 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012, Kaohsiung, Taiwan, 12-12-02. https://doi.org/10.1109/APCCAS.2012.6418989

Improvements of quasi-cyclic low-density parity-check codes based on hybrid structures of BIBD's schemes. / Yang, Chao Chin; Huan, Jen-Fa; Nieh, Ta Chun; Huang, Chun Ming.

2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012. 2012. p. 132-135 6418989 (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - Improvements of quasi-cyclic low-density parity-check codes based on hybrid structures of BIBD's schemes

AU - Yang, Chao Chin

AU - Huan, Jen-Fa

AU - Nieh, Ta Chun

AU - Huang, Chun Ming

PY - 2012/12/1

Y1 - 2012/12/1

N2 - In this paper, we propose a simple mathematical structure to improve the BER (bit error rate) performance of quasi-cyclic low-density parity-check (QC-LDPC) codes. Since the proposed structure can be defined in-between those of random codes and structured codes, these proposed QC-LDPC codes not only perform as well as random-LDPC codes, but also preserve the advantage of structured LDPC codes which is easier to implement over coding hardware. Moreover, the proposed structure, constructed from balanced incomplete block design (BIBD), can reduce the density of parity-check matrix and hence reduce the number of short cycles, which generally lead to better performance. At the end, we show that the error floor performance of QC-LDPC codes can be improved by proposed hybrid structures and perform well over binary-input additive white Gaussian noise (BI-AWGN) channel.

AB - In this paper, we propose a simple mathematical structure to improve the BER (bit error rate) performance of quasi-cyclic low-density parity-check (QC-LDPC) codes. Since the proposed structure can be defined in-between those of random codes and structured codes, these proposed QC-LDPC codes not only perform as well as random-LDPC codes, but also preserve the advantage of structured LDPC codes which is easier to implement over coding hardware. Moreover, the proposed structure, constructed from balanced incomplete block design (BIBD), can reduce the density of parity-check matrix and hence reduce the number of short cycles, which generally lead to better performance. At the end, we show that the error floor performance of QC-LDPC codes can be improved by proposed hybrid structures and perform well over binary-input additive white Gaussian noise (BI-AWGN) channel.

UR - http://www.scopus.com/inward/record.url?scp=84874179315&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84874179315&partnerID=8YFLogxK

U2 - 10.1109/APCCAS.2012.6418989

DO - 10.1109/APCCAS.2012.6418989

M3 - Conference contribution

SN - 9781457717291

T3 - IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

SP - 132

EP - 135

BT - 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012

ER -

Yang CC, Huan J-F, Nieh TC, Huang CM. Improvements of quasi-cyclic low-density parity-check codes based on hybrid structures of BIBD's schemes. In 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012. 2012. p. 132-135. 6418989. (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS). https://doi.org/10.1109/APCCAS.2012.6418989