Improving the electrical and hysteresis performance of amorphous igzo thin-film transistors using co-sputtered zirconium silicon oxide gate dielectrics

Chien Hsiung Hung; Shui Jinn Wang; Pang Yi Liu; Chien Hung Wu; Hao Ping Yan; Nai Sheng Wu; Tseng Hsing Lin

doi:10.1016/j.mssp.2017.05.017

Improving the electrical and hysteresis performance of amorphous igzo thin-film transistors using co-sputtered zirconium silicon oxide gate dielectrics

Chien Hsiung Hung, Shui Jinn Wang, Pang Yi Liu, Chien Hung Wu, Hao Ping Yan, Nai Sheng Wu, Tseng Hsing Lin

Institute of Microelectronics

Research output: Contribution to journal › Article › peer-review

10 Citations (Scopus)

Abstract

The use of co-sputtered Zirconium Silicon Oxide (Zr_xSi_1−xO₂) gate dielectrics to improve the performance of α-IGZO TFT is demonstrated. Through modulating the sputtering power of the SiO₂ and ZrO₂ targets, the control of dielectric constant in a range of 6.9–31.6 is shown. Prevention of polycrystalline formation of the Zr_xSi_1−xO₂ film up to 600 °C annealing and its effectiveness in reducing leakage currents and interface trap density are presented. Moreover, it is revealed that the Zr_0.85Si_0.15O₂ dielectric could lead to significantly improved TFT performance in terms of subthreshold swing (SS=81 mV/dec), field-effect mobility (μ_FE=51.7 cm²/Vs), and threshold voltage shift (ΔV_TH=0.03 V).

Original language	English
Pages (from-to)	84-91
Number of pages	8
Journal	Materials Science in Semiconductor Processing
Volume	67
DOIs	https://doi.org/10.1016/j.mssp.2017.05.017
Publication status	Published - 2017 Aug 15

All Science Journal Classification (ASJC) codes

General Materials Science
Condensed Matter Physics
Mechanics of Materials
Mechanical Engineering

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10.1016/j.mssp.2017.05.017

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@article{30935ca657eb4fd3b41e945332096756,

title = "Improving the electrical and hysteresis performance of amorphous igzo thin-film transistors using co-sputtered zirconium silicon oxide gate dielectrics",

abstract = "The use of co-sputtered Zirconium Silicon Oxide (ZrxSi1−xO2) gate dielectrics to improve the performance of α-IGZO TFT is demonstrated. Through modulating the sputtering power of the SiO2 and ZrO2 targets, the control of dielectric constant in a range of 6.9–31.6 is shown. Prevention of polycrystalline formation of the ZrxSi1−xO2 film up to 600 °C annealing and its effectiveness in reducing leakage currents and interface trap density are presented. Moreover, it is revealed that the Zr0.85Si0.15O2 dielectric could lead to significantly improved TFT performance in terms of subthreshold swing (SS=81 mV/dec), field-effect mobility (μFE=51.7 cm2/Vs), and threshold voltage shift (ΔVTH=0.03 V).",

author = "Hung, {Chien Hsiung} and Wang, {Shui Jinn} and Liu, {Pang Yi} and Wu, {Chien Hung} and Yan, {Hao Ping} and Wu, {Nai Sheng} and Lin, {Tseng Hsing}",

note = "Publisher Copyright: {\textcopyright} 2017 Elsevier Ltd",

year = "2017",

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day = "15",

doi = "10.1016/j.mssp.2017.05.017",

language = "English",

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journal = "Materials Science in Semiconductor Processing",

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T1 - Improving the electrical and hysteresis performance of amorphous igzo thin-film transistors using co-sputtered zirconium silicon oxide gate dielectrics

AU - Hung, Chien Hsiung

AU - Wang, Shui Jinn

AU - Liu, Pang Yi

AU - Wu, Chien Hung

AU - Yan, Hao Ping

AU - Wu, Nai Sheng

AU - Lin, Tseng Hsing

PY - 2017/8/15

Y1 - 2017/8/15

N2 - The use of co-sputtered Zirconium Silicon Oxide (ZrxSi1−xO2) gate dielectrics to improve the performance of α-IGZO TFT is demonstrated. Through modulating the sputtering power of the SiO2 and ZrO2 targets, the control of dielectric constant in a range of 6.9–31.6 is shown. Prevention of polycrystalline formation of the ZrxSi1−xO2 film up to 600 °C annealing and its effectiveness in reducing leakage currents and interface trap density are presented. Moreover, it is revealed that the Zr0.85Si0.15O2 dielectric could lead to significantly improved TFT performance in terms of subthreshold swing (SS=81 mV/dec), field-effect mobility (μFE=51.7 cm2/Vs), and threshold voltage shift (ΔVTH=0.03 V).

AB - The use of co-sputtered Zirconium Silicon Oxide (ZrxSi1−xO2) gate dielectrics to improve the performance of α-IGZO TFT is demonstrated. Through modulating the sputtering power of the SiO2 and ZrO2 targets, the control of dielectric constant in a range of 6.9–31.6 is shown. Prevention of polycrystalline formation of the ZrxSi1−xO2 film up to 600 °C annealing and its effectiveness in reducing leakage currents and interface trap density are presented. Moreover, it is revealed that the Zr0.85Si0.15O2 dielectric could lead to significantly improved TFT performance in terms of subthreshold swing (SS=81 mV/dec), field-effect mobility (μFE=51.7 cm2/Vs), and threshold voltage shift (ΔVTH=0.03 V).

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DO - 10.1016/j.mssp.2017.05.017

M3 - Article

AN - SCOPUS:85019918135

SN - 1369-8001

VL - 67

SP - 84

EP - 91

JO - Materials Science in Semiconductor Processing

JF - Materials Science in Semiconductor Processing

ER -

Improving the electrical and hysteresis performance of amorphous igzo thin-film transistors using co-sputtered zirconium silicon oxide gate dielectrics

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