Abstract
This paper presents a 60-GHz integrated variable-gain low-noise amplifier (VG-LNA) and full 360° phase shifter (PS) circuit, fabricated in 90-nm CMOS process, for phased-array antenna receiving system. In VG-LNA design, variable gain is achieved by a current-steering structure and low phase variation is achieved by a body-floating technique. The proposed 360° PS is implemented by cascading a 180° reflection-type and a 180° switch-type phase shifters. The measurement results show that a phase control range of 360° with a gain variation of 3.7 dB can be achieved. In terms of gain controlling capability, a 11.3-dB gain control range with a 13.5° phase variation is obtained. The total power consumption is 18 mW from a 1.5 V power supply. The chip size is 1.15 × 0.78 mm2.
| Original language | English |
|---|---|
| Title of host publication | SiRF 2014 - 2014 IEEE 14th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems |
| Publisher | IEEE Computer Society |
| Pages | 59-61 |
| Number of pages | 3 |
| ISBN (Print) | 9781479915231 |
| DOIs | |
| Publication status | Published - 2014 Jan 1 |
| Event | 2014 IEEE 14th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2014 - Newport Beach, CA, United States Duration: 2014 Jan 19 → 2014 Jan 23 |
Publication series
| Name | SiRF 2014 - 2014 IEEE 14th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems |
|---|
Other
| Other | 2014 IEEE 14th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2014 |
|---|---|
| Country | United States |
| City | Newport Beach, CA |
| Period | 14-01-19 → 14-01-23 |
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All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Electrical and Electronic Engineering
Cite this
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Integrated 60-GHz CMOS variable-gain low-noise amplifier and full 360° phase shifter for phased-array RF receiving system. / Yu, Chun Han; Lo, Pei Hua; Lyu, Jhin Ying; Kuo, Hsin Chih; Chuang, Huey Ru.
SiRF 2014 - 2014 IEEE 14th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems. IEEE Computer Society, 2014. p. 59-61 6828502 (SiRF 2014 - 2014 IEEE 14th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
TY - GEN
T1 - Integrated 60-GHz CMOS variable-gain low-noise amplifier and full 360° phase shifter for phased-array RF receiving system
AU - Yu, Chun Han
AU - Lo, Pei Hua
AU - Lyu, Jhin Ying
AU - Kuo, Hsin Chih
AU - Chuang, Huey Ru
PY - 2014/1/1
Y1 - 2014/1/1
N2 - This paper presents a 60-GHz integrated variable-gain low-noise amplifier (VG-LNA) and full 360° phase shifter (PS) circuit, fabricated in 90-nm CMOS process, for phased-array antenna receiving system. In VG-LNA design, variable gain is achieved by a current-steering structure and low phase variation is achieved by a body-floating technique. The proposed 360° PS is implemented by cascading a 180° reflection-type and a 180° switch-type phase shifters. The measurement results show that a phase control range of 360° with a gain variation of 3.7 dB can be achieved. In terms of gain controlling capability, a 11.3-dB gain control range with a 13.5° phase variation is obtained. The total power consumption is 18 mW from a 1.5 V power supply. The chip size is 1.15 × 0.78 mm2.
AB - This paper presents a 60-GHz integrated variable-gain low-noise amplifier (VG-LNA) and full 360° phase shifter (PS) circuit, fabricated in 90-nm CMOS process, for phased-array antenna receiving system. In VG-LNA design, variable gain is achieved by a current-steering structure and low phase variation is achieved by a body-floating technique. The proposed 360° PS is implemented by cascading a 180° reflection-type and a 180° switch-type phase shifters. The measurement results show that a phase control range of 360° with a gain variation of 3.7 dB can be achieved. In terms of gain controlling capability, a 11.3-dB gain control range with a 13.5° phase variation is obtained. The total power consumption is 18 mW from a 1.5 V power supply. The chip size is 1.15 × 0.78 mm2.
UR - http://www.scopus.com/inward/record.url?scp=84903826679&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84903826679&partnerID=8YFLogxK
U2 - 10.1109/SiRF.2014.6828502
DO - 10.1109/SiRF.2014.6828502
M3 - Conference contribution
AN - SCOPUS:84903826679
SN - 9781479915231
T3 - SiRF 2014 - 2014 IEEE 14th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems
SP - 59
EP - 61
BT - SiRF 2014 - 2014 IEEE 14th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems
PB - IEEE Computer Society
ER -