Investigation of electromigration reliability of redistribution lines in wafer-level chip-scale packages

Chin Li Kao, Tei Chen Chen, Yi Shao Lai, Ying Ta Chiu

Research output: Contribution to journalArticlepeer-review

3 Citations (Scopus)


Wafer-level chip-scale packages (WLCSPs) have become subject to the same drive for miniaturization as all electronic packages. The I/O count is increasing and ball pitch is shrinking at the expense of trace pitch and in turn, current densities are increasing. This leads to current crowding and Joule heating in the vicinity of solder joints and under bump metallurgy (UBM) structures where resistance values change significantly. These phenomena are responsible for structural damage of redistribution line (RDL)/UBM and UBM/solder interconnects due to ionic diffusion or electromigration. In this work, sputtered Al and electroplated Cu RDLs were examined and quantified by three-dimensional electrothermal coupling analysis. Results provide a guideline for estimating maximum allowable currents and electromigration lifetime.

Original languageEnglish
Pages (from-to)2471-2478
Number of pages8
JournalMicroelectronics Reliability
Issue number11
Publication statusPublished - 2014 Nov 1

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Atomic and Molecular Physics, and Optics
  • Condensed Matter Physics
  • Safety, Risk, Reliability and Quality
  • Surfaces, Coatings and Films
  • Electrical and Electronic Engineering


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