Investigation of step-doped channel heterostructure field-effect transistor

Wen Chau Liu; Lih Wen Laih; Jung Hui Tsai; Jing Yuh Chen; Wei Chou Wang; Po Hung Lin

Investigation of step-doped channel heterostructure field-effect transistor

Wen Chau Liu, Lih Wen Laih, Jung Hui Tsai, Jing Yuh Chen, Wei Chou Wang, Po Hung Lin

Research output: Contribution to conference › Paper › peer-review

Abstract

Two kinds of heterostructure field-effect transistor (FET) with an InGaAs step-doped-channel (SDC) profile have been fabricated and demonstrated. For the 1×100 μm² gated dimension, the maximum drain saturation currents were 735 and 675 mA/mm, the maximum transconductances 200 and 232 mS/mm, the gate breakdown voltages 15 V and 12 V, the wide gate voltage swing 3.3 and 2.6 V with transconductance g_m higher than 150 mS/mm. A simple model is employed to analyze the performance of threshold voltage V_T and the threshold voltage -3.7 and -1.8 V are obtained, respectively. These good performances show the studied SDCFET have good potential for high-speed, high-power circuit applications.

Original language	English
Pages	251-254
Number of pages	4
Publication status	Published - 1996 Dec 1
Event	Proceedings of the 1996 Conference on Optoelectronic & Microelectronic Materials and Devices, COMMAD - Canberra, Aust Duration: 1996 Dec 8 → 1996 Dec 11

Other

Other	Proceedings of the 1996 Conference on Optoelectronic & Microelectronic Materials and Devices, COMMAD
City	Canberra, Aust
Period	96-12-08 → 96-12-11

All Science Journal Classification (ASJC) codes

Engineering(all)

Cite this

@conference{e47c932b2dc4482cb0b07d0c0bf85b22,

title = "Investigation of step-doped channel heterostructure field-effect transistor",

abstract = "Two kinds of heterostructure field-effect transistor (FET) with an InGaAs step-doped-channel (SDC) profile have been fabricated and demonstrated. For the 1×100 μm2 gated dimension, the maximum drain saturation currents were 735 and 675 mA/mm, the maximum transconductances 200 and 232 mS/mm, the gate breakdown voltages 15 V and 12 V, the wide gate voltage swing 3.3 and 2.6 V with transconductance gm higher than 150 mS/mm. A simple model is employed to analyze the performance of threshold voltage VT and the threshold voltage -3.7 and -1.8 V are obtained, respectively. These good performances show the studied SDCFET have good potential for high-speed, high-power circuit applications.",

author = "Liu, {Wen Chau} and Laih, {Lih Wen} and Tsai, {Jung Hui} and Chen, {Jing Yuh} and Wang, {Wei Chou} and Lin, {Po Hung}",

year = "1996",

month = dec,

day = "1",

language = "English",

pages = "251--254",

note = "Proceedings of the 1996 Conference on Optoelectronic & Microelectronic Materials and Devices, COMMAD ; Conference date: 08-12-1996 Through 11-12-1996",

}

TY - CONF

T1 - Investigation of step-doped channel heterostructure field-effect transistor

AU - Liu, Wen Chau

AU - Laih, Lih Wen

AU - Tsai, Jung Hui

AU - Chen, Jing Yuh

AU - Wang, Wei Chou

AU - Lin, Po Hung

PY - 1996/12/1

Y1 - 1996/12/1

N2 - Two kinds of heterostructure field-effect transistor (FET) with an InGaAs step-doped-channel (SDC) profile have been fabricated and demonstrated. For the 1×100 μm2 gated dimension, the maximum drain saturation currents were 735 and 675 mA/mm, the maximum transconductances 200 and 232 mS/mm, the gate breakdown voltages 15 V and 12 V, the wide gate voltage swing 3.3 and 2.6 V with transconductance gm higher than 150 mS/mm. A simple model is employed to analyze the performance of threshold voltage VT and the threshold voltage -3.7 and -1.8 V are obtained, respectively. These good performances show the studied SDCFET have good potential for high-speed, high-power circuit applications.

AB - Two kinds of heterostructure field-effect transistor (FET) with an InGaAs step-doped-channel (SDC) profile have been fabricated and demonstrated. For the 1×100 μm2 gated dimension, the maximum drain saturation currents were 735 and 675 mA/mm, the maximum transconductances 200 and 232 mS/mm, the gate breakdown voltages 15 V and 12 V, the wide gate voltage swing 3.3 and 2.6 V with transconductance gm higher than 150 mS/mm. A simple model is employed to analyze the performance of threshold voltage VT and the threshold voltage -3.7 and -1.8 V are obtained, respectively. These good performances show the studied SDCFET have good potential for high-speed, high-power circuit applications.

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UR - http://www.scopus.com/inward/citedby.url?scp=0030361657&partnerID=8YFLogxK

M3 - Paper

AN - SCOPUS:0030361657

SP - 251

EP - 254

T2 - Proceedings of the 1996 Conference on Optoelectronic & Microelectronic Materials and Devices, COMMAD

Y2 - 8 December 1996 through 11 December 1996

ER -

Investigation of step-doped channel heterostructure field-effect transistor

Abstract

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