Investigation of step-doped channel heterostructure field-effect transistor

L. W. Laih, J. H. Tsai, C. Z. Wu, S. Y. Cheng, W. C. Liu

Research output: Contribution to journalArticlepeer-review

3 Citations (Scopus)

Abstract

A new heterostructure field-effect transistor (FET) with an InGaAs step-doped-channel (SDC) profile has been fabricated and demonstrated. The SDCFET studied provides the advantages of high current density, high breakdown voltage, wide gate voltage swing for high transconductance, and adjustable threshold voltage. A simple model is employed to analyse the performance of threshold voltage. For comparison two kinds of SDCFETs have been fabricated. For the 1 × 100μm2 gated dimension, maximum drain saturation currents of 735 and 675 mA/mm, maximum transconductances of 200 and 232mS/mm, gate breakdown voltages of 15 and 12V, wide gate voltage swing of 3.3 and 2.6V with transconductance gm higher than 150mS/ mm, and threshold voltage -3.7 and -1.8V are obtained, respectively. These good performance figures show the SDCFET has good potential for high-speed, high-power circuit applications.

Original languageEnglish
Pages (from-to)309-312
Number of pages4
JournalIEE Proceedings: Circuits, Devices and Systems
Volume144
Issue number5
DOIs
Publication statusPublished - 1997

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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