Investigation on single pulse avalanche failure of 900V SiC MOSFETs

Na Ren, Hao Hu, Kang L. Wang, Zheng Zuo, Ruigang Li, Kuang Sheng

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)

Abstract

In this work, avalanche ruggedness and failure mechanisms of 900V SiC MOSFETs under single-pulse Unclamped Inductive Switching (UIS) test are investigated and compared with Si counterparts. It was found in this work that, due to the higher resistance to BJT latch-up, only uniform heating related device temperature limit failure exists in SiC MOSFETs. Experimental results also show that, SiC MOSFETs have 9 times higher avalanche energy per area and 50% higher avalanche current than Si MOSFETs in low inductance/short pulse condition. In large inductance/long pulse condition, SiC MOSFETs have shorter avalanche duration, lower avalanche current and only similar avalanche energy per area compared to Si, due to the much smaller (15∗) chip size, thinner active layer thickness and higher power density.

Original languageEnglish
Title of host publication2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages431-434
Number of pages4
ISBN (Electronic)9781538629260
DOIs
Publication statusPublished - 2018 Jun 22
Event30th IEEE International Symposium on Power Semiconductor Devices and ICs, ISPSD 2018 - Chicago, United States
Duration: 2018 May 132018 May 17

Publication series

NameProceedings of the International Symposium on Power Semiconductor Devices and ICs
Volume2018-May
ISSN (Print)1063-6854

Conference

Conference30th IEEE International Symposium on Power Semiconductor Devices and ICs, ISPSD 2018
CountryUnited States
CityChicago
Period18-05-1318-05-17

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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