TY - GEN
T1 - Leveraging the strengths of transactional memory while maintaining system performance for a multiplayer gaming application
AU - Shu, Lih Chyun
AU - Su, Ying Cheng
AU - Tasi, Chang Ming
AU - Sun, Huey Min
PY - 2012
Y1 - 2012
N2 - With the technology of multi-core on the rise, many applications have started to support concurrency control on shared resources for raising performance and accuracy such as locks, semaphores, and monitors. A new mechanism called transactional memory (TM) can provide serilizability for using shared resources and ease for programming. However, the TM performance of most studies has been relatively poorer than traditional methods. This is the reason why these applications still use the locks to handle the problem of concurrency control. We propose two mechanisms named Barrier Transactional Memory and Aggregate Physics Update to detect and release signals without conflict and to update all calculation results using parallel multi-threading in a multi-player gaming system. Experimental results show the improvement and the comparison of the proposed mechanisms to traditional locking and single thread update, especially in the area of physics calculations and updating.
AB - With the technology of multi-core on the rise, many applications have started to support concurrency control on shared resources for raising performance and accuracy such as locks, semaphores, and monitors. A new mechanism called transactional memory (TM) can provide serilizability for using shared resources and ease for programming. However, the TM performance of most studies has been relatively poorer than traditional methods. This is the reason why these applications still use the locks to handle the problem of concurrency control. We propose two mechanisms named Barrier Transactional Memory and Aggregate Physics Update to detect and release signals without conflict and to update all calculation results using parallel multi-threading in a multi-player gaming system. Experimental results show the improvement and the comparison of the proposed mechanisms to traditional locking and single thread update, especially in the area of physics calculations and updating.
UR - http://www.scopus.com/inward/record.url?scp=84866680707&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84866680707&partnerID=8YFLogxK
U2 - 10.1007/978-3-642-33065-0_2
DO - 10.1007/978-3-642-33065-0_2
M3 - Conference contribution
AN - SCOPUS:84866680707
SN - 9783642330643
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 10
EP - 20
BT - Algorithms and Architectures for Parallel Processing - 12th International Conference, ICA3PP 2012, Proceedings
T2 - 12th International Conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2012
Y2 - 4 September 2012 through 7 September 2012
ER -