Library-adaptively integrated data path synthesis for DSP systems

Jer-Min Jou; Shiann Rong Kuang

Library-adaptively integrated data path synthesis for DSP systems

Jer-Min Jou, Shiann Rong Kuang

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

A new algorithm for the integrated data path synthesis of high-performance DSP systems has been proposed in this paper. The integrated synthesis problem, that is the combined problem of module selection, scheduling, and allocation, is systematically formulated as a clique-partition problem of mixed-vertex compatibility graph on a module library and is solved simultaneously. We introduce a global cost function based on clique-partition heuristic to evaluate each decision along the synthesis process. Salient features, such as library-adaptive and integrated processing (i.e., make all resources, including operators and interconnects, tradeoffs), are processed in the algorithm and experimental results are quite encouraged.

Original language	English
Title of host publication	Proceedings - IEEE International Conference on Computer Design
Subtitle of host publication	VLSI in Computers and Processors
Editors	Anon
Publisher	Publ by IEEE
Pages	379-382
Number of pages	4
ISBN (Print)	0818642300
Publication status	Published - 1993 Dec 1
Event	Proceedings of the 1993 IEEE International Conference on Computer Design: VLSI in Computers & Processors - Cambridge, MA, USA Duration: 1993 Oct 3 → 1993 Oct 6

Publication series

Name	Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Other

Other	Proceedings of the 1993 IEEE International Conference on Computer Design: VLSI in Computers & Processors
City	Cambridge, MA, USA
Period	93-10-03 → 93-10-06

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering

Cite this

@inproceedings{9b8b641b1a9c4dcc82ff1fad141d3f8d,

title = "Library-adaptively integrated data path synthesis for DSP systems",

abstract = "A new algorithm for the integrated data path synthesis of high-performance DSP systems has been proposed in this paper. The integrated synthesis problem, that is the combined problem of module selection, scheduling, and allocation, is systematically formulated as a clique-partition problem of mixed-vertex compatibility graph on a module library and is solved simultaneously. We introduce a global cost function based on clique-partition heuristic to evaluate each decision along the synthesis process. Salient features, such as library-adaptive and integrated processing (i.e., make all resources, including operators and interconnects, tradeoffs), are processed in the algorithm and experimental results are quite encouraged.",

author = "Jer-Min Jou and Kuang, {Shiann Rong}",

year = "1993",

month = dec,

day = "1",

language = "English",

isbn = "0818642300",

series = "Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors",

publisher = "Publ by IEEE",

pages = "379--382",

editor = "Anon",

booktitle = "Proceedings - IEEE International Conference on Computer Design",

note = "Proceedings of the 1993 IEEE International Conference on Computer Design: VLSI in Computers & Processors ; Conference date: 03-10-1993 Through 06-10-1993",

}

Jou, J-M & Kuang, SR 1993, Library-adaptively integrated data path synthesis for DSP systems. in Anon (ed.), Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors. Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors, Publ by IEEE, pp. 379-382, Proceedings of the 1993 IEEE International Conference on Computer Design: VLSI in Computers & Processors, Cambridge, MA, USA, 93-10-03.

Library-adaptively integrated data path synthesis for DSP systems. / Jou, Jer-Min; Kuang, Shiann Rong.
Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors. ed. / Anon. Publ by IEEE, 1993. p. 379-382 (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - Library-adaptively integrated data path synthesis for DSP systems

AU - Jou, Jer-Min

AU - Kuang, Shiann Rong

PY - 1993/12/1

Y1 - 1993/12/1

N2 - A new algorithm for the integrated data path synthesis of high-performance DSP systems has been proposed in this paper. The integrated synthesis problem, that is the combined problem of module selection, scheduling, and allocation, is systematically formulated as a clique-partition problem of mixed-vertex compatibility graph on a module library and is solved simultaneously. We introduce a global cost function based on clique-partition heuristic to evaluate each decision along the synthesis process. Salient features, such as library-adaptive and integrated processing (i.e., make all resources, including operators and interconnects, tradeoffs), are processed in the algorithm and experimental results are quite encouraged.

AB - A new algorithm for the integrated data path synthesis of high-performance DSP systems has been proposed in this paper. The integrated synthesis problem, that is the combined problem of module selection, scheduling, and allocation, is systematically formulated as a clique-partition problem of mixed-vertex compatibility graph on a module library and is solved simultaneously. We introduce a global cost function based on clique-partition heuristic to evaluate each decision along the synthesis process. Salient features, such as library-adaptive and integrated processing (i.e., make all resources, including operators and interconnects, tradeoffs), are processed in the algorithm and experimental results are quite encouraged.

UR - http://www.scopus.com/inward/record.url?scp=0027883325&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0027883325&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:0027883325

SN - 0818642300

T3 - Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

SP - 379

EP - 382

BT - Proceedings - IEEE International Conference on Computer Design

A2 - Anon, null

PB - Publ by IEEE

T2 - Proceedings of the 1993 IEEE International Conference on Computer Design: VLSI in Computers & Processors

Y2 - 3 October 1993 through 6 October 1993

ER -

Library-adaptively integrated data path synthesis for DSP systems

Abstract

Publication series

Other

All Science Journal Classification (ASJC) codes

Other files and links

Fingerprint

Cite this