TY - GEN
T1 - Low-complexity architecture for Chase soft-decision Reed-Solomon decoding
AU - Lu, Yung Kuei
AU - Chung, Shen Ming
AU - Shieh, Ming-Der
PY - 2014/1/1
Y1 - 2014/1/1
N2 - Soft-decision decoding of Reed-Solomon (RS) codes can achieve good coding gain by using the probability information from the channel. Among various soft-decision algorithms, the Chase algorithm has moderate performance and rational complexity and hence is usually designed for hardware implementation. Chase-type decoders, however, still have much higher complexity than that of conventional hard-decision decoders. This paper proposes a reduced-complexity Chase (RCC) algorithm and its corresponding high-speed VLSI architecture. With the developed fast and efficient decision-making scheme, the resulting hardware complexity is greatly reduced while keeping the error correction performance comparable to that of the Chase decoders. For a (255, 239) RS code, experimental results show that the proposed decoder design has at least 44.6% improvement in area-time complexity as compared to the related works.
AB - Soft-decision decoding of Reed-Solomon (RS) codes can achieve good coding gain by using the probability information from the channel. Among various soft-decision algorithms, the Chase algorithm has moderate performance and rational complexity and hence is usually designed for hardware implementation. Chase-type decoders, however, still have much higher complexity than that of conventional hard-decision decoders. This paper proposes a reduced-complexity Chase (RCC) algorithm and its corresponding high-speed VLSI architecture. With the developed fast and efficient decision-making scheme, the resulting hardware complexity is greatly reduced while keeping the error correction performance comparable to that of the Chase decoders. For a (255, 239) RS code, experimental results show that the proposed decoder design has at least 44.6% improvement in area-time complexity as compared to the related works.
UR - http://www.scopus.com/inward/record.url?scp=84903977504&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84903977504&partnerID=8YFLogxK
U2 - 10.1109/VLSI-DAT.2014.6834896
DO - 10.1109/VLSI-DAT.2014.6834896
M3 - Conference contribution
AN - SCOPUS:84903977504
SN - 9781479927760
T3 - Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2014
BT - Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2014
PB - IEEE Computer Society
T2 - 2014 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2014
Y2 - 28 April 2014 through 30 April 2014
ER -