Abstract
In this paper, we propose a reduced complexity architecture for the active interference cancellation (AIC) technique. Computation power is saved mainly by exploiting the regularity of the matrix structure. The proposed architecture is implemented using fixed-point computation with low hardware cost. Simulation results show that the performance of the proposed scheme is almost the same as that of the original floating-point AIC scheme.
| Original language | English |
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| Title of host publication | 2009 International Conference on Communications, Circuits and Systems, ICCCAS 2009 |
| Pages | 272-276 |
| Number of pages | 5 |
| Publication status | Published - 2009 |
| Event | 2009 International Conference on Communications, Circuits and Systems, ICCCAS 2009 - Milpitas, CA, United States Duration: 2009 Jul 23 → 2009 Jul 25 |
Other
| Other | 2009 International Conference on Communications, Circuits and Systems, ICCCAS 2009 |
|---|---|
| Country/Territory | United States |
| City | Milpitas, CA |
| Period | 09-07-23 → 09-07-25 |
All Science Journal Classification (ASJC) codes
- Computer Networks and Communications
- Hardware and Architecture
- Electrical and Electronic Engineering