Low-power a-Si:H gate driver circuit with threshold-voltage-shift recovery and synchronously controlled pull-down scheme

Chih Lung Lin, Mao Hsun Cheng, Chun Da Tu, Chia En Wu, Fu Hsing Chen

Research output: Contribution to journalArticlepeer-review

37 Citations (Scopus)

Abstract

This paper presents a new low-power gate driver circuit designed by hydrogenated amorphous silicon thin-film transistors (a-Si:H TFTs). An attempt is also made to reduce the power consumption resulting from the high-frequency pull-down structure, in which a pair of 0.25-Hz clock signals is used to implement a low-frequency and synchronously controlled pull-down scheme for recovering the threshold voltage shifts of a-Si:H TFTs under the negative gate-to-source voltage and decreasing the used TFTs. Measurement results indicate that the proposed gate driver circuit consumes 98.7 μW/stage, and the output waveforms are very stable without distortion when the proposed circuit is operated at 100 °C for 840 h. Furthermore, the feasibility of the proposed gate driver circuit is demonstrated for the quad-extended-video-graphics-array resolution.

Original languageEnglish
Article number6975051
Pages (from-to)136-142
Number of pages7
JournalIEEE Transactions on Electron Devices
Volume62
Issue number1
DOIs
Publication statusPublished - 2015 Jan 1

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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