Low-power and wide-bandwidth cyclic ADC with capacitor and opamp reuse techniques for CMOS image sensor application

Jin Fu Lin, Soon Jyh Chang, Chin Fong Chiu, Hann Huei Tsai, Jiann Jong Wang

Research output: Contribution to journalArticle

15 Citations (Scopus)

Abstract

In this paper, a power-efficient programmable gain amplifier (PGA) and a cyclic analog-to-digital converter (ADC) are developed for a satellite CMOS image sensor system. The cyclic ADC employs capacitor and opamp reuse techniques to reduce power consumption and occupied silicon area. Moreover, a power-efficient and wide-bandwidth telescopic cascode gain boosting amplifier with capacitive level shifters is adopted to decrease its power consumption further. According to the system specification, a 10-bit, 14-MS/s cyclic ADC with the front-end PGA circuit is implemented in the TSMC 0.18-μm triple-well 1P3M CMOS image sensor (CIS) process. The proposed cyclic ADC achieves a spurious free dynamic range (SFDR) of 65.1 dB and a signal-to-noise distortion ratio (SNDR) of 52.44 dB with 5-MHz input frequency at 14 MS/s. The power consumption of the cyclic ADC and PGA from a 3.3 V supply are 15.84 mW and 5.78 mW, respectively. The total core area is 0.381 mm2.

Original languageEnglish
Article number05310989
Pages (from-to)2044-2054
Number of pages11
JournalIEEE Sensors Journal
Volume9
Issue number12
DOIs
Publication statusPublished - 2009 Dec 1

All Science Journal Classification (ASJC) codes

  • Instrumentation
  • Electrical and Electronic Engineering

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