Low power design of phase-change memory based on a comprehensive model

M. H. Chiang; Y. B. Liao; J. T. Lin; W. C. Hsu; C. Yu; P. C. Chiang; Y. Y. Hsu; W. H. Liu; S. S. Sheu; K. Li Su; M. J. Kao; M. J. Tsai

doi:10.1049/iet-cdt.2009.0037

Low power design of phase-change memory based on a comprehensive model

M. H. Chiang, Y. B. Liao, J. T. Lin, W. C. Hsu, C. Yu, P. C. Chiang, Y. Y. Hsu, W. H. Liu, S. S. Sheu, K. Li Su, M. J. Kao, M. J. Tsai

Research output: Contribution to journal › Article › peer-review

Abstract

In this study, the authors propose non-conventional phase-change memory programming schemes using a comprehensive model, which integrates the underlying electrical and thermal theories. Various pulsing schemes aiming to reduce operation power without compromising performance are assessed based on a calibrated model. Our results suggest that optimisation of power consumption can be done simply by design of pulsing techniques.

Original language	English
Article number	ICDTA6000004000004000285000001
Pages (from-to)	285-292
Number of pages	8
Journal	IET Computers and Digital Techniques
Volume	4
Issue number	4
DOIs	https://doi.org/10.1049/iet-cdt.2009.0037
Publication status	Published - 2010 Jul

All Science Journal Classification (ASJC) codes

Software
Hardware and Architecture
Electrical and Electronic Engineering

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10.1049/iet-cdt.2009.0037

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abstract = "In this study, the authors propose non-conventional phase-change memory programming schemes using a comprehensive model, which integrates the underlying electrical and thermal theories. Various pulsing schemes aiming to reduce operation power without compromising performance are assessed based on a calibrated model. Our results suggest that optimisation of power consumption can be done simply by design of pulsing techniques.",

author = "Chiang, {M. H.} and Liao, {Y. B.} and Lin, {J. T.} and Hsu, {W. C.} and C. Yu and Chiang, {P. C.} and Hsu, {Y. Y.} and Liu, {W. H.} and Sheu, {S. S.} and Su, {K. Li} and Kao, {M. J.} and Tsai, {M. J.}",

year = "2010",

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AU - Chiang, M. H.

AU - Liao, Y. B.

AU - Lin, J. T.

AU - Hsu, W. C.

AU - Yu, C.

AU - Chiang, P. C.

AU - Hsu, Y. Y.

AU - Liu, W. H.

AU - Sheu, S. S.

AU - Su, K. Li

AU - Kao, M. J.

AU - Tsai, M. J.

PY - 2010/7

Y1 - 2010/7

N2 - In this study, the authors propose non-conventional phase-change memory programming schemes using a comprehensive model, which integrates the underlying electrical and thermal theories. Various pulsing schemes aiming to reduce operation power without compromising performance are assessed based on a calibrated model. Our results suggest that optimisation of power consumption can be done simply by design of pulsing techniques.

AB - In this study, the authors propose non-conventional phase-change memory programming schemes using a comprehensive model, which integrates the underlying electrical and thermal theories. Various pulsing schemes aiming to reduce operation power without compromising performance are assessed based on a calibrated model. Our results suggest that optimisation of power consumption can be done simply by design of pulsing techniques.

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ER -

Low power design of phase-change memory based on a comprehensive model

Abstract

All Science Journal Classification (ASJC) codes

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