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Low-Power Testing for C-testable Iterative Logic Arrays

  • S.-A. Hwang
  • , Cheng-Wen Wu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Original languageEnglish
Title of host publicationIEEE International Symposium on VLSI Technology, Systems, and Applications (VLSI-TSA)
Place of PublicationTaipei
Pages355-358
Publication statusPublished - 1997 Jun

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