Low Vt gate-first Al/TaN/[Ir3Si-HfSi 2-x]/HfLaON CMOS using simple laser annealing/reflection

C. C. Liao, Albert Chin, N. C. Su, M. F. Li, S. J. Wang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

18 Citations (Scopus)

Abstract

We report low Vt Al/TaN/[Ir3Si-HfSi 2-x]/HfLaON CMOS using simple laser annealing/reflection with self-aligned and gate-first process compatible with current VLSI. At 1.05 nm EOT, good θm-eff of 5.04 and 4.24 eV, low Vt of -0.16 and 0.13 V, high mobility of 85 and 209 cm2/Vs, and small 85°C BTI ≤40 mV (10 MV/cm, 1 hr) are measured for p- and n-MOS.

Original languageEnglish
Title of host publication2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT
Pages190-191
Number of pages2
DOIs
Publication statusPublished - 2008 Sep 23
Event2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT - Honolulu, HI, United States
Duration: 2008 Jun 172008 Jun 19

Publication series

NameDigest of Technical Papers - Symposium on VLSI Technology
ISSN (Print)0743-1562

Other

Other2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT
CountryUnited States
CityHonolulu, HI
Period08-06-1708-06-19

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Low V<sub>t</sub> gate-first Al/TaN/[Ir<sub>3</sub>Si-HfSi <sub>2-x</sub>]/HfLaON CMOS using simple laser annealing/reflection'. Together they form a unique fingerprint.

  • Cite this

    Liao, C. C., Chin, A., Su, N. C., Li, M. F., & Wang, S. J. (2008). Low Vt gate-first Al/TaN/[Ir3Si-HfSi 2-x]/HfLaON CMOS using simple laser annealing/reflection. In 2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT (pp. 190-191). [4588614] (Digest of Technical Papers - Symposium on VLSI Technology). https://doi.org/10.1109/VLSIT.2008.4588614