Low Vt Metal-Gate/High-k CMOS From Understanding the Mechanism to Innovative Solution

Shui-Jinn Wang, A. Chin, C. H. Cheng, N. C. Su, C. C. Liao, C. P. Chou, H.L. Hwang

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Original language	English
Title of host publication	International Conference on Solid State Devices and materials (SSDM'08)
Place of Publication	Tsukuba
Publication status	Published - 2008 Sept 23

Cite this

@inproceedings{b76e476ba26c4019a1860909b8e10d53,

title = "Low Vt Metal-Gate/High-k CMOS From Understanding the Mechanism to Innovative Solution",

author = "Shui-Jinn Wang and A. Chin and Cheng, {C. H.} and Su, {N. C.} and Liao, {C. C.} and Chou, {C. P.} and H.L. Hwang",

year = "2008",

month = sep,

day = "23",

language = "English",

booktitle = "International Conference on Solid State Devices and materials (SSDM'08)",

}

TY - GEN

T1 - Low Vt Metal-Gate/High-k CMOS From Understanding the Mechanism to Innovative Solution

AU - Wang, Shui-Jinn

AU - Chin, A.

AU - Cheng, C. H.

AU - Su, N. C.

AU - Liao, C. C.

AU - Chou, C. P.

AU - Hwang, H.L.

PY - 2008/9/23

Y1 - 2008/9/23

M3 - Conference contribution

BT - International Conference on Solid State Devices and materials (SSDM'08)

CY - Tsukuba

ER -