Mapping visual signal processing onto multi-core platform via algorithm/architecture co-exploration

Chun Fu Chen, Gwo Giun Chris Lee, Zheng Han Yu, Chun His Huang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Degree of parallelism and data communication should be investigated to achieve high performance for mapping algorithm onto multi-core platform since multi-core platform would concurrently process multiple tasks and lots of data would be transferred between storages and processors. This paper proposes a method to resolve the burden of increase on data transfer rate in parallel processing via the analysis on the dependency matrix of data flow graph. The proposed method does not bias any multi-core platform since it just considers the intrinsic characteristics of algorithm, i.e., data flow graph. This paper utilizes dependency matrix, which conveys the causality of data transfer, for quantifying data transfer rate and corresponding storage requirement; as a consequence, a feasible mapping result, which has smaller data transfer rate and acceptable storage requirement, was exploited. Furthermore, in conjunction with degree of parallelism quantification, this paper presents a comprehensive exploration on design space for mapping algorithm onto multi-core platform through dependency matrix. IBM Cell Broadband Engine is selected to be the targeted multi-core platform in this paper. Experimental results show that when six cores are used, our result can speedup 5.75x on average as compared to single-core case; in addition, by integrating the proposed method on data transfer analysis, about 46% cycles of data transfer could be saved and overall performance could be further increased to 7.51x on average in comparison with the scenario of single-core without data reuse.

Original languageEnglish
Title of host publicationIEEE Workshop on Signal Processing Systems, SiPS
Subtitle of host publicationDesign and Implementation
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781479965885
DOIs
Publication statusPublished - 2014 Dec 15
Event2014 IEEE Workshop on Signal Processing Systems, SiPS 2014 - Belfast, United Kingdom
Duration: 2014 Oct 202014 Oct 22

Publication series

NameIEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
ISSN (Print)1520-6130

Other

Other2014 IEEE Workshop on Signal Processing Systems, SiPS 2014
CountryUnited Kingdom
CityBelfast
Period14-10-2014-10-22

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Signal Processing
  • Applied Mathematics
  • Hardware and Architecture

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