Abstract
Turbo coding is a powerful encoding and decoding technique that can provide highly reliable data transmission at extremely low signal-to-noise ratios. According to the computational complexity of the employed decoding algorithm, the realization of turbo decoders usually takes a large amount of memory spaces and potentially long decoding delay. Therefore, an efficient memory management strategy becomes one of the key factors toward successfully designing turbo decoders. This paper focuses on the development of general formulas for efficient memory management of turbo decoders employing the sliding-window BCJR algorithm. Three simple but general results are presented to evaluate the required memory size, throughput rate, and latency based on the speed and the number of adopted processors. The results thus provide useful and general information on practical implementations of turbo decoders.
Original language | English |
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Journal | Proceedings - IEEE International Symposium on Circuits and Systems |
Volume | 5 |
Publication status | Published - 2002 Jan 1 |
Event | 2002 IEEE International Symposium on Circuits and Systems - Phoenix, AZ, United States Duration: 2002 May 26 → 2002 May 29 |
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering