@inproceedings{db3085693af446d2849e923779598d2b,
title = "Metastability behavior of mismatched CMOS flip-flops using state diagram analysis",
abstract = "The effect on the metastability of mismatched FET parameters and load capacitances in CMOS latch/flip-flop is analyzed. A novel method using state diagrams is proposed. On the state diagrams obtained by transient analysis of the latch, a straight line can be approximately drawn that defines two semi-planes, which determine precisely the latch final state. Several SPICE simulation results are shown for matched/mismatched flip-flops.",
author = "Noije, {W. A.M.} and Liu, {W. T.} and Navarro, {S. J.}",
year = "1993",
language = "English",
isbn = "0780308263",
series = "Proceedings of the Custom Integrated Circuits Conference",
publisher = "Publ by IEEE",
pages = "27.7.1.--27.7.",
booktitle = "Proceedings of the Custom Integrated Circuits Conference",
note = "Proceedings of the IEEE 1993 Custom Integrated Circuits Conference ; Conference date: 09-05-1993 Through 12-05-1993",
}