Abstract
A method of fabricating a thin film transistor (TFT) and a top-gate type thin film transistor are disclosed, the method of fabricating a TFT of the present invention comprises steps: (A) providing a substrate; (B) forming a source electrode, a drain electrode, and SWCNT (singled-walled carbon nanotubes) layer on the substrate, in which the source electrode and the drain electrode are spaced in a distance and the SWCNT layer is located between the source electrode and the drain electrode; (C) forming a gate oxide layer on the SWCNT layer; (D) annealing the gate oxide layer with oxygen or nitrogen gas; and (E) forming a gate electrode on the gate oxide layer; wherein the temperature used in the step (D) for annealing is a 500° C. to 600° C.
| Translated title of the contribution | 薄膜電晶體之製備方法及頂閘極式薄膜電晶體 |
|---|---|
| Original language | English |
| Patent number | 特許地5553856? |
| Publication status | Published - 2012 Nov 29 |