TY - JOUR
T1 - Mixed-mode simulation tools for custom VLSI designs.
AU - Salama, Roberto
AU - Liu, Wentai
AU - Gyurcsik, Ronald S.
PY - 1988
Y1 - 1988
N2 - A system for performing concurrent VLSI simulation on a distributed processing system is presented. The system provides an expandable medium which allows the coexistence of existing different-level simulation programs. Several design examples including various word-length Manchester carry-chain adders, Booth-encoded multipliers, and one stage of a two-dimensional fast Fourier transform circuit have been simulated using RNL at the switch level, FACTS at the electrical level, and Lisp routines at the functional level. The largest circuit simulated thus far contains 29,000 transistors and was simulated in 24 concurrent processes executing on four SUN III workstations. The system can be further enriched by integrating other existing behavior, register-transfer, and logic-level simulation programs. The possibility of integrating an analog-circuit simulation program is currently being investigated.
AB - A system for performing concurrent VLSI simulation on a distributed processing system is presented. The system provides an expandable medium which allows the coexistence of existing different-level simulation programs. Several design examples including various word-length Manchester carry-chain adders, Booth-encoded multipliers, and one stage of a two-dimensional fast Fourier transform circuit have been simulated using RNL at the switch level, FACTS at the electrical level, and Lisp routines at the functional level. The largest circuit simulated thus far contains 29,000 transistors and was simulated in 24 concurrent processes executing on four SUN III workstations. The system can be further enriched by integrating other existing behavior, register-transfer, and logic-level simulation programs. The possibility of integrating an analog-circuit simulation program is currently being investigated.
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M3 - Conference article
AN - SCOPUS:0024139940
SN - 0886-5930
SP - 6.3/1-4
JO - Proceedings of the Custom Integrated Circuits Conference
JF - Proceedings of the Custom Integrated Circuits Conference
ER -