Monolithic inverter using GaN-based CMOS-HEMTs with depletion-mode and enhancement-mode of ferroelectric charge trap gate stacked oxide layers

Monolithic inverter was constructed by gallium nitride (GaN)-based complementary metal-oxide-semiconductor high-electron mobility transistors (CMOS-HEMTs). In the GaN-based CMOS-HEMTs, the load-type depletion-mode MOSHEMTs (D-MOSHEMTs) were fabricated by using photoelectrochemical (PEC) etched gate-recessed region and PEC directly oxidized gate layer, and the driver-type enhancement-mode MOSHEMTs (E-MOSHEMTs) were fabricated using PEC etched gate-recessed region and stacked LiNbO₃/HfO₂/Al₂O₃ ferroelectric charge trap oxide layers. Under the current ratio β (defined as saturation drain-source current of E-MOSHEMTs divided by saturation drain-source current of D-MOSHEMTs, I_DSE/I_DSD) value of 22.0 and drain voltage of D-MOSHEMTs (V_DD) of 5 V, when the input voltage of 0 V and 5 V was respectively applied to the monolithic inverter, it obtained the unskewed performances of a low output voltage of 0.10 V, output swing voltage of 4.90 V, high noise margin voltage of 1.99 V, and low noise margin voltage of 1.73 V.