TY - GEN
T1 - MTJ variation monitor-assisted adaptive MRAM write
AU - Wang, Shaodi
AU - Lee, Hochul
AU - Grezes, Cecile
AU - Khalili, Pedram
AU - Wang, Kang L.
AU - Gupta, Puneet
N1 - Publisher Copyright:
© 2016 ACM.
PY - 2016/6/5
Y1 - 2016/6/5
N2 - Spin-transfer torque random access memory (STT-RAM) and magnetoelectric random access memory (MeRAM) are promising non-volatile memory technologies. But STT-RAM and Me RAM both suffer from high write error rate due to thermal fluctuation of magnetization. Temperature and wafer-level process variation significantly exacerbate these problems. In this paper, we propose a design that adaptively selects optimized write pulse for STT-RAM and MeRAM to overcome ambient process and temperature variation. To enable the adaptive write, we design specific MTJ-based variation monitor, which precisely senses process and temperature variation. The monitor is over 10X faster, 5X more energy-efficient, and 20X smaller compared with conventional thermal monitors of similar accuracy. With adaptive write, the write latency of STT-RAM and MeRAM cache are reduced by up to 17% and 59% respectively, and application run time is improved by up to 41%.
AB - Spin-transfer torque random access memory (STT-RAM) and magnetoelectric random access memory (MeRAM) are promising non-volatile memory technologies. But STT-RAM and Me RAM both suffer from high write error rate due to thermal fluctuation of magnetization. Temperature and wafer-level process variation significantly exacerbate these problems. In this paper, we propose a design that adaptively selects optimized write pulse for STT-RAM and MeRAM to overcome ambient process and temperature variation. To enable the adaptive write, we design specific MTJ-based variation monitor, which precisely senses process and temperature variation. The monitor is over 10X faster, 5X more energy-efficient, and 20X smaller compared with conventional thermal monitors of similar accuracy. With adaptive write, the write latency of STT-RAM and MeRAM cache are reduced by up to 17% and 59% respectively, and application run time is improved by up to 41%.
UR - https://www.scopus.com/pages/publications/84977156498
UR - https://www.scopus.com/pages/publications/84977156498#tab=citedBy
U2 - 10.1145/2897937.2897979
DO - 10.1145/2897937.2897979
M3 - Conference contribution
AN - SCOPUS:84977156498
T3 - Proceedings - Design Automation Conference
BT - Proceedings of the 53rd Annual Design Automation Conference, DAC 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 53rd Annual ACM IEEE Design Automation Conference, DAC 2016
Y2 - 5 June 2016 through 9 June 2016
ER -