Multi-visit TAMs to reduce the post-bond test length of 2.5D-SICs with a passive silicon interposer base

Chun Chuan Chi, Erik Jan Marinissen, Sandeep Kumar Goel, Cheng Wen Wu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

13 Citations (Scopus)

Abstract

2.5D Stacked ICs (2.5D-SICs) consist of multiple active dies (or 3D towers of active dies), which are placed side-by-side on top of and interconnected through a passive silicon interposer base which contains Through-Silicon Vias (TSVs). A previously presented post-bond test and Design-for-Test(DfT) strategy for such 2.5D-SICs implements a serial Test Access Mechanism (TAM) for interposer and micro-bump testing. In addition, it tries to identify an as-wide-as-possible set of functional interposer interconnects that can be reused as parallel TAMs to the various dies. In this paper, we extend that approach with the concept of Multi-Visit TAMs, i.e., parallel TAMs which are allowed to visit the same die more than once. For minimal additional hardware costs, the Multi-Visit TAMs succeed significantly more often in identifying a valid parallel TAM and achieve significantly lower test lengths.

Original languageEnglish
Title of host publicationProceedings of the 20th Asian Test Symposium, ATS 2011
Pages451-456
Number of pages6
DOIs
Publication statusPublished - 2011 Dec 1
Event20th Asian Test Symposium, ATS 2011 - New Delhi, India
Duration: 2011 Nov 202011 Nov 23

Publication series

NameProceedings of the Asian Test Symposium
ISSN (Print)1081-7735

Conference

Conference20th Asian Test Symposium, ATS 2011
CountryIndia
CityNew Delhi
Period11-11-2011-11-23

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Multi-visit TAMs to reduce the post-bond test length of 2.5D-SICs with a passive silicon interposer base'. Together they form a unique fingerprint.

Cite this