Nanoscale CMOSFET performance improvement and reliability study for local strain techniques

Hui Ling Huang, Jem Kun Chen, Mau Phon Houng

Research output: Contribution to journalArticlepeer-review

5 Citations (Scopus)

Abstract

In this paper, we report the investigation on a nanoscale complementary metal-oxide-semiconductor field-effect transistor (CMOSFET) fabricated by local strained channel techniques with epitaxial silicon-germanium (SiGe) and high mechanical stress SiN as contact etch stop layer (CESL). By integrating the SiGe layer with compressive stress and the SiN film with compressive and tensile strain, both PMOS and NMOS have better drain-to-source saturation current (Isat). For short channel effect, strain scheme also show beneficial results based on Vt-roll off performance. Furthermore when capping a strained tensile film, the interface trap density for NMOS could lower down 32% comparing to control Si from charge pumping current measurement which can indicate more stable initial gate oxide quality for NMOS. The impact of these stressor schemes on device reliability, such as negative bias temperature instability (NBTI) and hot carrier injection (HCI) have been studied to conclude that the hydrogen from compressive SiN is the key for reliability performance.

Original languageEnglish
Pages (from-to)31-36
Number of pages6
JournalSolid-State Electronics
Volume79
DOIs
Publication statusPublished - 2013 Jan 1

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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