NetVP: A system-level NETwork Virtual Platform for network accelerator development

Chen Chieh Wang; Sheng Hsin Lo; Yao Ning Liu; Chung-Ho Chen

doi:10.1109/ISCAS.2012.6271806

NetVP: A system-level NETwork Virtual Platform for network accelerator development

Chen Chieh Wang, Sheng Hsin Lo, Yao Ning Liu, Chung-Ho Chen

Institute of Computer and Communication Engineering

Research output: Contribution to conference › Paper › peer-review

1 Citation (Scopus)

Abstract

In this paper, we propose a Network Virtual Platform (NetVP) to develop and verify network accelerator like an IPsec processor. The NetVP provides on-line verification mechanism and is suitable for ESL top-down design flow, supporting developments of un-timed as well as timed models. System development using this NetVP is efficient and flexible since it allows the designer to explore design spaces such as the network bandwidth and system architecture easily.

Original language	English
Pages	249-252
Number of pages	4
DOIs	https://doi.org/10.1109/ISCAS.2012.6271806
Publication status	Published - 2012 Sept 28
Event	2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 - Seoul, Korea, Republic of Duration: 2012 May 20 → 2012 May 23

Other

Other	2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012
Country/Territory	Korea, Republic of
City	Seoul
Period	12-05-20 → 12-05-23

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering

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10.1109/ISCAS.2012.6271806

Cite this

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abstract = "In this paper, we propose a Network Virtual Platform (NetVP) to develop and verify network accelerator like an IPsec processor. The NetVP provides on-line verification mechanism and is suitable for ESL top-down design flow, supporting developments of un-timed as well as timed models. System development using this NetVP is efficient and flexible since it allows the designer to explore design spaces such as the network bandwidth and system architecture easily.",

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year = "2012",

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doi = "10.1109/ISCAS.2012.6271806",

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AU - Chen, Chung-Ho

PY - 2012/9/28

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N2 - In this paper, we propose a Network Virtual Platform (NetVP) to develop and verify network accelerator like an IPsec processor. The NetVP provides on-line verification mechanism and is suitable for ESL top-down design flow, supporting developments of un-timed as well as timed models. System development using this NetVP is efficient and flexible since it allows the designer to explore design spaces such as the network bandwidth and system architecture easily.

AB - In this paper, we propose a Network Virtual Platform (NetVP) to develop and verify network accelerator like an IPsec processor. The NetVP provides on-line verification mechanism and is suitable for ESL top-down design flow, supporting developments of un-timed as well as timed models. System development using this NetVP is efficient and flexible since it allows the designer to explore design spaces such as the network bandwidth and system architecture easily.

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NetVP: A system-level NETwork Virtual Platform for network accelerator development

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