NetVP: A system-level NETwork Virtual Platform for network accelerator development

Chen Chieh Wang, Sheng Hsin Lo, Yao Ning Liu, Chung-Ho Chen

Research output: Contribution to conferencePaper

1 Citation (Scopus)

Abstract

In this paper, we propose a Network Virtual Platform (NetVP) to develop and verify network accelerator like an IPsec processor. The NetVP provides on-line verification mechanism and is suitable for ESL top-down design flow, supporting developments of un-timed as well as timed models. System development using this NetVP is efficient and flexible since it allows the designer to explore design spaces such as the network bandwidth and system architecture easily.

Original languageEnglish
Pages249-252
Number of pages4
DOIs
Publication statusPublished - 2012 Sep 28
Event2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 - Seoul, Korea, Republic of
Duration: 2012 May 202012 May 23

Other

Other2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012
CountryKorea, Republic of
CitySeoul
Period12-05-2012-05-23

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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    Wang, C. C., Lo, S. H., Liu, Y. N., & Chen, C-H. (2012). NetVP: A system-level NETwork Virtual Platform for network accelerator development. 249-252. Paper presented at 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea, Republic of. https://doi.org/10.1109/ISCAS.2012.6271806