Nonlinear phase-locked loop design using semidefinite programming

Ta-Chung Wang, Tsung Yu Chiou, Sanjay Lall

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

The Phase-Locked Loop(PLL) is a key component of modern electronic communication and control systems. PLL is designed to extract signals from transmission channels. It plays an important role in systems where it is required to estimate the phase of a received signal, such as carrier tracking from global positioning system (GPS) satellites. In order to robustly provide centimeter-level accuracy, it is crucial for the PLL to estimate the instantaneous phase of an incoming signal which is usually buried in random noise or some type of interference. This paper presents an approach that utilizes the recent development in the semi-definite programming and sumof-squares (SOS) field. A Lyapunov function will be searched as the certificate of the lock-in region of the PLL system. Moreover, the polynomial design technique will be used to further refine the controller parameters for system response away from the equilibrium point. Various simulation results will be provided to show the effectiveness of this approach.

Original languageEnglish
Title of host publication2008 Mediterranean Conference on Control and Automation - Conference Proceedings, MED'08
Pages1640-1645
Number of pages6
DOIs
Publication statusPublished - 2008 Oct 6
Event2008 Mediterranean Conference on Control and Automation, MED'08 - Ajaccio-Corsica, France
Duration: 2008 Jun 252008 Jun 27

Publication series

Name2008 Mediterranean Conference on Control and Automation - Conference Proceedings, MED'08

Other

Other2008 Mediterranean Conference on Control and Automation, MED'08
CountryFrance
CityAjaccio-Corsica
Period08-06-2508-06-27

All Science Journal Classification (ASJC) codes

  • Control and Systems Engineering

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