OFF-state avalanche-breakdown-induced ON-resistance degradation in lateral DMOS transistors

Jone F. Chen, J. R. Lee, Kuo Ming Wu, Tsung Yi Huang, C. M. Liu, S. L. Hsu

Research output: Contribution to journalArticlepeer-review

19 Citations (Scopus)


In this letter, ON-resistance RON degradation in lateral double-diffused MOS transistors is observed when the device is operated under OFF-state avalanche-breakdown condition. Although interface states and positive oxide-trapped charges are created near the drain, interface-state generation is identified to be the main degradation mechanism. Technology computer-aided design simulation suggests that the driving force of damage is breakdown-induced hole injection. Experimental data show that RON degradation has the tendency to saturate, in agreement with the saturation of interface-state generation and oxide-trapped charges data extracted by charge-pumping measurement.

Original languageEnglish
Pages (from-to)1033-1035
Number of pages3
JournalIEEE Electron Device Letters
Issue number11
Publication statusPublished - 2007 Nov

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering


Dive into the research topics of 'OFF-state avalanche-breakdown-induced ON-resistance degradation in lateral DMOS transistors'. Together they form a unique fingerprint.

Cite this