TY - GEN
T1 - On-chip analog response extraction with 1-bit Σ-Δ Modulators
AU - Hong, Hao Chiao
AU - Huang, Jiun Lang
AU - Cheng, Kwang Ting
AU - Wu, Cheng Wen
PY - 2002/1/1
Y1 - 2002/1/1
N2 - Because of their relative robustness to process variation, Σ-Δ modulation techniques are particularly suitable for VLSI implementations. In this paper, we propose to employ the 1-bit Σ-Δ modulation ADC (analog-to-digital converter) as the on-chip analog response extractor for analog/mixed-signal BIST (built-in self-test) applications. To validate the idea, a prototype chip with the proposed BIST circuitry has been designed and fabricated. Performance of the BIST circuitry is validated (up to 87 dB dynamic range), and measurement results of the circuit under test (CUT), a 2nd-order low-pass filter, are presented.
AB - Because of their relative robustness to process variation, Σ-Δ modulation techniques are particularly suitable for VLSI implementations. In this paper, we propose to employ the 1-bit Σ-Δ modulation ADC (analog-to-digital converter) as the on-chip analog response extractor for analog/mixed-signal BIST (built-in self-test) applications. To validate the idea, a prototype chip with the proposed BIST circuitry has been designed and fabricated. Performance of the BIST circuitry is validated (up to 87 dB dynamic range), and measurement results of the circuit under test (CUT), a 2nd-order low-pass filter, are presented.
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U2 - 10.1109/ATS.2002.1181684
DO - 10.1109/ATS.2002.1181684
M3 - Conference contribution
AN - SCOPUS:2642518558
T3 - Proceedings of the Asian Test Symposium
SP - 49
EP - 54
BT - Proceedings of the 11th Asian Test Symposium, ATS 2002
PB - IEEE Computer Society
T2 - 11th Asian Test Symposium, ATS 2002
Y2 - 18 November 2002 through 20 November 2002
ER -