On-line error detection schemes for a systolic finite-field inverter

Yu Chun Chuang, Cheng Wen Wu

Research output: Contribution to journalConference article

3 Citations (Scopus)

Abstract

Galois-field (GF) is a number system with a finite set of elements. It is widely used in error-control coding, cryptography, etc. Among its important arithmetic operations, inversion and division have been identified as the most complicated. In this paper, concurrent error detection (CED) schemes have been presented for a systolic GF(2m) inverter that we have proposed recently. The CED circuitry tests the inverter concurrently while it is in normal operation to increase the reliability of the inverter. There is negligible performance penalty. Analysis shows that all single cell faults can be detected concurrently. The area overhead is less than 5% for 11 bits or longer words.

Original languageEnglish
Pages (from-to)301-305
Number of pages5
JournalProceedings of the Asian Test Symposium
Publication statusPublished - 1998 Dec 1
EventProceedings of the 1998 7th Asian Test Symposium - Singapore, Singapore
Duration: 1998 Dec 21998 Dec 4

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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