On the design of a fault-tolerant systolic array multiplier using time redundancy

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Original language	English
Title of host publication	International Symposium on IC Design and Manufacturing (ISIC)
Place of Publication	Singapore
Pages	497-502
Publication status	Published - 1991 Sept

Cite this

@inproceedings{d1686bd4293b469f8d0573f5270324d8,

title = "On the design of a fault-tolerant systolic array multiplier using time redundancy",

author = "T.-Y. Chang and C.-C. Wang and J.-B. Shu and Cheng-Wen Wu",

year = "1991",

month = sep,

language = "English",

pages = "497--502",

booktitle = "International Symposium on IC Design and Manufacturing (ISIC)",

}