Standard complementary-metal-oxide semi-conductor (CMOS) process for the advantages in batch production, low cost, and mostly importantly, scalability has been applied to thermoelectric generator (TEG) designs, where silicon materials are preferable for monolithic circuit integration. In this work, the BiCMOS process is found to be a perfect platform for TEG designs to achieve higher performance by the polysilicon-germanium thin film layer. Simulations of the TEG designs by 0.35 μm SiGe 3P3M and 0.18 μm SiGe 3P6M BiCMOS processes (TSMC) show that the power factors are respectively 0.242 and 0.125 μW/cm2 K2, and the voltage factors are 10.04 and 25.91 V/cm2 K. Both are shown to be superior to all micro TEGs by semiconductor process in the open literature. Experimental verifications confirm the simulation results and validate the effectiveness of TEG designs by the polysilicon-germanium thin film layer in BiCMOS process.
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Surfaces, Coatings and Films
- Metals and Alloys
- Electrical and Electronic Engineering