On the pseudomorphic high electron mobility transistors (PHEMTs) with a low-temperature gate approach

Li Yang Chen, Huey Ing Chen, Shiou Ying Cheng, Tzu Pin Chen, Tsung Han Tsai, Yi Jung Liu, Yi Wen Huang, Chien Chang Huang, Wen Chau Liu

Research output: Contribution to journalArticle

8 Citations (Scopus)

Abstract

The characteristics of AlGaAs/InGaAs/GaAs depletion-mode (D-mode) and enhancement-mode (E-mode) pseudomorphic high electron mobility transistors (PHEMTs) fabricated using an electroless-plated (EP) deposition approach are investigated. Under the low-temperature and low-energy conditions, the EP deposition approach can form a better metal-semiconductor interface. For the studied devices, with 1 × 100 μ2 gate dimension, excellent characteristics of the maximum drain saturation current (168.9 mA/mm) and extrinsic transconductance (225.8 mS/mm) are obtained for the D-mode device. The corresponding values for the E-mode device are 152.5 mA/mm and 211.7 mS/ mm, respectively. Moreover, the EP approach also has the advantages of easy operation and low cost.

Original languageEnglish
Pages (from-to)325-327
Number of pages3
JournalIEEE Electron Device Letters
Volume30
Issue number4
DOIs
Publication statusPublished - 2009 Mar 10

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High electron mobility transistors
Transconductance
Metals
Semiconductor materials
Temperature
Costs
gallium arsenide

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Chen, Li Yang ; Chen, Huey Ing ; Cheng, Shiou Ying ; Chen, Tzu Pin ; Tsai, Tsung Han ; Liu, Yi Jung ; Huang, Yi Wen ; Huang, Chien Chang ; Liu, Wen Chau. / On the pseudomorphic high electron mobility transistors (PHEMTs) with a low-temperature gate approach. In: IEEE Electron Device Letters. 2009 ; Vol. 30, No. 4. pp. 325-327.
@article{f2e70c381cd04f5d8b349126c8a1dee7,
title = "On the pseudomorphic high electron mobility transistors (PHEMTs) with a low-temperature gate approach",
abstract = "The characteristics of AlGaAs/InGaAs/GaAs depletion-mode (D-mode) and enhancement-mode (E-mode) pseudomorphic high electron mobility transistors (PHEMTs) fabricated using an electroless-plated (EP) deposition approach are investigated. Under the low-temperature and low-energy conditions, the EP deposition approach can form a better metal-semiconductor interface. For the studied devices, with 1 × 100 μ2 gate dimension, excellent characteristics of the maximum drain saturation current (168.9 mA/mm) and extrinsic transconductance (225.8 mS/mm) are obtained for the D-mode device. The corresponding values for the E-mode device are 152.5 mA/mm and 211.7 mS/ mm, respectively. Moreover, the EP approach also has the advantages of easy operation and low cost.",
author = "Chen, {Li Yang} and Chen, {Huey Ing} and Cheng, {Shiou Ying} and Chen, {Tzu Pin} and Tsai, {Tsung Han} and Liu, {Yi Jung} and Huang, {Yi Wen} and Huang, {Chien Chang} and Liu, {Wen Chau}",
year = "2009",
month = "3",
day = "10",
doi = "10.1109/LED.2009.2014788",
language = "English",
volume = "30",
pages = "325--327",
journal = "IEEE Electron Device Letters",
issn = "0741-3106",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "4",

}

Chen, LY, Chen, HI, Cheng, SY, Chen, TP, Tsai, TH, Liu, YJ, Huang, YW, Huang, CC & Liu, WC 2009, 'On the pseudomorphic high electron mobility transistors (PHEMTs) with a low-temperature gate approach', IEEE Electron Device Letters, vol. 30, no. 4, pp. 325-327. https://doi.org/10.1109/LED.2009.2014788

On the pseudomorphic high electron mobility transistors (PHEMTs) with a low-temperature gate approach. / Chen, Li Yang; Chen, Huey Ing; Cheng, Shiou Ying; Chen, Tzu Pin; Tsai, Tsung Han; Liu, Yi Jung; Huang, Yi Wen; Huang, Chien Chang; Liu, Wen Chau.

In: IEEE Electron Device Letters, Vol. 30, No. 4, 10.03.2009, p. 325-327.

Research output: Contribution to journalArticle

TY - JOUR

T1 - On the pseudomorphic high electron mobility transistors (PHEMTs) with a low-temperature gate approach

AU - Chen, Li Yang

AU - Chen, Huey Ing

AU - Cheng, Shiou Ying

AU - Chen, Tzu Pin

AU - Tsai, Tsung Han

AU - Liu, Yi Jung

AU - Huang, Yi Wen

AU - Huang, Chien Chang

AU - Liu, Wen Chau

PY - 2009/3/10

Y1 - 2009/3/10

N2 - The characteristics of AlGaAs/InGaAs/GaAs depletion-mode (D-mode) and enhancement-mode (E-mode) pseudomorphic high electron mobility transistors (PHEMTs) fabricated using an electroless-plated (EP) deposition approach are investigated. Under the low-temperature and low-energy conditions, the EP deposition approach can form a better metal-semiconductor interface. For the studied devices, with 1 × 100 μ2 gate dimension, excellent characteristics of the maximum drain saturation current (168.9 mA/mm) and extrinsic transconductance (225.8 mS/mm) are obtained for the D-mode device. The corresponding values for the E-mode device are 152.5 mA/mm and 211.7 mS/ mm, respectively. Moreover, the EP approach also has the advantages of easy operation and low cost.

AB - The characteristics of AlGaAs/InGaAs/GaAs depletion-mode (D-mode) and enhancement-mode (E-mode) pseudomorphic high electron mobility transistors (PHEMTs) fabricated using an electroless-plated (EP) deposition approach are investigated. Under the low-temperature and low-energy conditions, the EP deposition approach can form a better metal-semiconductor interface. For the studied devices, with 1 × 100 μ2 gate dimension, excellent characteristics of the maximum drain saturation current (168.9 mA/mm) and extrinsic transconductance (225.8 mS/mm) are obtained for the D-mode device. The corresponding values for the E-mode device are 152.5 mA/mm and 211.7 mS/ mm, respectively. Moreover, the EP approach also has the advantages of easy operation and low cost.

UR - http://www.scopus.com/inward/record.url?scp=67349127530&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=67349127530&partnerID=8YFLogxK

U2 - 10.1109/LED.2009.2014788

DO - 10.1109/LED.2009.2014788

M3 - Article

AN - SCOPUS:67349127530

VL - 30

SP - 325

EP - 327

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

SN - 0741-3106

IS - 4

ER -