On the temperature-dependent characteristics of a Pd/InAlAs based electroless-plating gate metamorphic heterostructure field-effect transistor (MHFET)

Chien Chang Huang, Huey-Ing Chen, Tai You Chen, Chi Shiang Hsu, Chun Chia Chen, Hsuan Sheng Chang, Wen-Chau Liu

Research output: Contribution to journalArticle

4 Citations (Scopus)

Abstract

In this work, the interesting temperature-dependent characteristics of a Pd/InAlAs based metamorphic heterostructure field-effect transistor (MHFET) with an electroless plating (EP)-gate approach are demonstrated and studied. Based on the low-energy and low-temperature chemical deposition, the EP technique can reduce the thermal damage and disordered-states to form a better metal-semiconductor (MS) interface. The EP-gate device shows better performance including higher turn-on voltage (0.978 V), lower gate leakage current (2.1 μA/mm), higher Schottky barrier height (0.742 eV), lower ideality factor (1.15), higher transconductance (272.4 mS/mm), higher drain saturation current (420.2 mA/mm), wider I DS operating region (291.3 mA/mm), and higher voltage gain (449.7) than a thermal evaporation (TE)-gate one over a wide temperature range (300-420 K).

Original languageEnglish
Pages (from-to)50-55
Number of pages6
JournalSolid-State Electronics
Volume79
DOIs
Publication statusPublished - 2013 Jan 1

Fingerprint

Electroless plating
High electron mobility transistors
plating
field effect transistors
Thermal evaporation
Transconductance
Electric potential
Leakage currents
Temperature
temperature
transconductance
Metals
Semiconductor materials
high voltages
leakage
evaporation
damage
saturation
electric potential
metals

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

Cite this

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abstract = "In this work, the interesting temperature-dependent characteristics of a Pd/InAlAs based metamorphic heterostructure field-effect transistor (MHFET) with an electroless plating (EP)-gate approach are demonstrated and studied. Based on the low-energy and low-temperature chemical deposition, the EP technique can reduce the thermal damage and disordered-states to form a better metal-semiconductor (MS) interface. The EP-gate device shows better performance including higher turn-on voltage (0.978 V), lower gate leakage current (2.1 μA/mm), higher Schottky barrier height (0.742 eV), lower ideality factor (1.15), higher transconductance (272.4 mS/mm), higher drain saturation current (420.2 mA/mm), wider I DS operating region (291.3 mA/mm), and higher voltage gain (449.7) than a thermal evaporation (TE)-gate one over a wide temperature range (300-420 K).",
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On the temperature-dependent characteristics of a Pd/InAlAs based electroless-plating gate metamorphic heterostructure field-effect transistor (MHFET). / Huang, Chien Chang; Chen, Huey-Ing; Chen, Tai You; Hsu, Chi Shiang; Chen, Chun Chia; Chang, Hsuan Sheng; Liu, Wen-Chau.

In: Solid-State Electronics, Vol. 79, 01.01.2013, p. 50-55.

Research output: Contribution to journalArticle

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AU - Hsu, Chi Shiang

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AU - Chang, Hsuan Sheng

AU - Liu, Wen-Chau

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