Parallel decoding of binary BCH codes

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6 Citations (Scopus)

Abstract

A parallel decoding procedure for the BCH codes is introduced, which is particularly useful for decoding BCH codes with small error-correcting capability. The high regularity inherent in the scheme enable it to be easily implemented with VLSI circuits.

Original languageEnglish
Pages (from-to)2223-2225
Number of pages3
JournalElectronics Letters
Volume27
Issue number24
DOIs
Publication statusPublished - 1991 Nov 7

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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