Parallel processing for deblocking filter in H.264/AVC

Chung Ming Chen, Chung-Ho Chen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Abstract

In this paper, we propose an efficient parallel architecture for the adaptive deblocking filter in H.264/AVC video coding standard. We use six forwarding shift register arrays (of which each contains 4×4 8-bit shift registers) with two transposing operations and two sets of filter operation (each set contains four edge filter operations) to support simultaneous processing of the horizontal and vertical filtering. The proposed architecture is called "Parallel Filtering Architecture (PFA)." As a result, the performance of PFA is 390% faster than the advanced architecture of the previous proposal. Moreover, the number of total memory references is reduced by 63% and 25% respectively compared to the basic and advanced architectures of the previous proposal.

Original languageEnglish
Title of host publicationProceedings of the Fourth IASTED International Conference on Communications, Internet, and Information Technology, CIIT 2005
EditorsM.H. Hamza
Pages188-191
Number of pages4
Publication statusPublished - 2005 Dec 1
EventFourth IASTED International Conference on Communications, Internet, and Information Technology, CIIT 2005 - Cambridge, MA, United States
Duration: 2005 Oct 312005 Nov 2

Publication series

NameProceedings of the Fourth IASTED International Conference on Communications, Internet, and Information Technology, CIIT 2005

Other

OtherFourth IASTED International Conference on Communications, Internet, and Information Technology, CIIT 2005
CountryUnited States
CityCambridge, MA
Period05-10-3105-11-02

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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