Abstract
This paper presents two improved triple parity placement schemes, the HDD1 (Horizontal and Dual Diagonal) scheme and the HDD2 scheme, to enhance the reliability of a disk array system. Both the schemes can tolerate up to three column disk failures by using three types of parity information (horizontal, diagonal, and anti-diagonal parities) in a disk array. HDD1 scheme can decrease the frequency of bottlenecks because its horizontal and anti-diagonal parities are uniformly distributed over a disk array, with its diagonal parities placed in dedicated column disks. HDD2 scheme possesses one more column disks than HDD1 to store the horizontal parities and an additional diagonal parity; its anti-diagonal and diagonal parities are placed in the same way as in HDD1 scheme, only with a minor difference. The encoding and decoding algorithms of the two schemes are rather simple and straightforward, some steps of its procedure can even be executed in parallel, which makes the disk failure recovery faster.
| Original language | English |
|---|---|
| Pages (from-to) | 583-591 |
| Number of pages | 9 |
| Journal | IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences |
| Volume | E89-A |
| Issue number | 2 |
| DOIs | |
| Publication status | Published - 2006 |
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All Science Journal Classification (ASJC) codes
- Signal Processing
- Computer Graphics and Computer-Aided Design
- Applied Mathematics
- Electrical and Electronic Engineering
Cite this
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Parity placement schemes to facilitate recovery from triple column disk failure in disk array systems. / Tau, Chih Shing; Wang, Tzone-I.
In: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E89-A, No. 2, 2006, p. 583-591.Research output: Contribution to journal › Article
TY - JOUR
T1 - Parity placement schemes to facilitate recovery from triple column disk failure in disk array systems
AU - Tau, Chih Shing
AU - Wang, Tzone-I
PY - 2006
Y1 - 2006
N2 - This paper presents two improved triple parity placement schemes, the HDD1 (Horizontal and Dual Diagonal) scheme and the HDD2 scheme, to enhance the reliability of a disk array system. Both the schemes can tolerate up to three column disk failures by using three types of parity information (horizontal, diagonal, and anti-diagonal parities) in a disk array. HDD1 scheme can decrease the frequency of bottlenecks because its horizontal and anti-diagonal parities are uniformly distributed over a disk array, with its diagonal parities placed in dedicated column disks. HDD2 scheme possesses one more column disks than HDD1 to store the horizontal parities and an additional diagonal parity; its anti-diagonal and diagonal parities are placed in the same way as in HDD1 scheme, only with a minor difference. The encoding and decoding algorithms of the two schemes are rather simple and straightforward, some steps of its procedure can even be executed in parallel, which makes the disk failure recovery faster.
AB - This paper presents two improved triple parity placement schemes, the HDD1 (Horizontal and Dual Diagonal) scheme and the HDD2 scheme, to enhance the reliability of a disk array system. Both the schemes can tolerate up to three column disk failures by using three types of parity information (horizontal, diagonal, and anti-diagonal parities) in a disk array. HDD1 scheme can decrease the frequency of bottlenecks because its horizontal and anti-diagonal parities are uniformly distributed over a disk array, with its diagonal parities placed in dedicated column disks. HDD2 scheme possesses one more column disks than HDD1 to store the horizontal parities and an additional diagonal parity; its anti-diagonal and diagonal parities are placed in the same way as in HDD1 scheme, only with a minor difference. The encoding and decoding algorithms of the two schemes are rather simple and straightforward, some steps of its procedure can even be executed in parallel, which makes the disk failure recovery faster.
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U2 - 10.1093/ietfec/e89-a.2.583
DO - 10.1093/ietfec/e89-a.2.583
M3 - Article
AN - SCOPUS:33645750025
VL - E89-A
SP - 583
EP - 591
JO - IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
JF - IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
SN - 0916-8508
IS - 2
ER -