PASS: A package for automatic scheduling and sharing pipelined data paths

Jer Min Jou, Chengli Cin Chin, Yi Ru Li

Research output: Contribution to journalConference articlepeer-review

4 Citations (Scopus)

Abstract

A system for automatic scheduling and sharing data paths has been developed. It is generic; different design styles such as pipeline, chaining, loop pipelines, etc., have been considered, and solutions of fastest possible, cheapest possible, fastest within hardware constraints, or lowest cost within time constraint could be found according to the user's request. The entire design space then could be explored with it. The scheduling algorithm is stepwise selective, dealing with hardware urgency, time urgency, interconnection urgency, data urgency, and control urgency in a serial method with multiple levels of selections. the concept of the sharing algorithm is to consider the inter-influenced properties between operator-sharing and register-sharing, construct two inter-involved sharing criteria for them simultaneously, and then merge them concurrently.

Original languageEnglish
Pages (from-to)1769-1772
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume3
Publication statusPublished - 1991 Dec 1
Event1991 IEEE International Symposium on Circuits and Systems Part 4 (of 5) - Singapore, Singapore
Duration: 1991 Jun 111991 Jun 14

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'PASS: A package for automatic scheduling and sharing pipelined data paths'. Together they form a unique fingerprint.

Cite this