Performance-driven analog placement considering monotonic current paths

Po Hsun Wu, Mark Po Hung Lin, Yang Ru Chen, Bing Shiun Chou, Tung Chieh Chen, Tsung Yi Ho, Bin Da Liu

Research output: Contribution to journalConference articlepeer-review

18 Citations (Scopus)


Although modern analog placement algorithms aimed to minimize area and wirelength while satisfying symmetry, proximity, and other placement constraints, the generated layout does not reflect the circuit performance very well because of the routing-induced parasitics on the critical current/signal paths. This paper introduces the current-path constraints in analog placement, demonstrates their impact on circuit performance, and derives new problem formulation and algorithms to find placement solutions with monotonic current paths. Experimental results show that the proposed formulation and algorithms can generate compact layouts resulting in the even better circuit performance after performing post-layout simulation.

Original languageEnglish
Article number6386735
Pages (from-to)613-619
Number of pages7
JournalIEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
Publication statusPublished - 2012 Dec 1
Event2012 30th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2012 - San Jose, CA, United States
Duration: 2012 Nov 52012 Nov 8

All Science Journal Classification (ASJC) codes

  • Software
  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design


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