Perspective of tunnel-FET for future low-power technology nodes

A. S. Verhulst, D. Verreck, Q. Smets, Kuo-Hsing Kao, M. Van De Put, R. Rooyackers, B. Sorée, A. Vandooren, K. De Meyer, G. Groeseneken, M. M. Heyns, A. Mocuta, N. Collaert, A. V.Y. Thean

Research output: Contribution to journalConference article

10 Citations (Scopus)

Abstract

Theoretically, confined heterostructure p(-n)-i-n (n(-p)-i-p) TFETs are promising candidates for future low-power applications, with n-TFET outperforming p-TFET. An optimal body thickness of about 10nm is predicted for Ga0.5As0.5Sb-In0.53Ga0.47As n-TFET with I60=20μA/μm. For p-TFETs, stronger confinement may be required to avoid tunneling to the heavy-hole band. An unexploited domain is the insertion of thin heterostructure slabs offering a locally reduced dielectric constant, enhancing both SS and Ion.

Original languageEnglish
Article number7047140
Pages (from-to)30.2.1-30.2.4
JournalTechnical Digest - International Electron Devices Meeting, IEDM
Volume2015-February
Issue numberFebruary
DOIs
Publication statusPublished - 2015 Feb 20
Event2014 60th IEEE International Electron Devices Meeting, IEDM 2014 - San Francisco, United States
Duration: 2014 Dec 152014 Dec 17

Fingerprint

Field effect transistors
Heterojunctions
tunnels
insertion
Tunnels
slabs
field effect transistors
permittivity
Permittivity

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

Cite this

Verhulst, A. S., Verreck, D., Smets, Q., Kao, K-H., Van De Put, M., Rooyackers, R., ... Thean, A. V. Y. (2015). Perspective of tunnel-FET for future low-power technology nodes. Technical Digest - International Electron Devices Meeting, IEDM, 2015-February(February), 30.2.1-30.2.4. [7047140]. https://doi.org/10.1109/IEDM.2014.7047140
Verhulst, A. S. ; Verreck, D. ; Smets, Q. ; Kao, Kuo-Hsing ; Van De Put, M. ; Rooyackers, R. ; Sorée, B. ; Vandooren, A. ; De Meyer, K. ; Groeseneken, G. ; Heyns, M. M. ; Mocuta, A. ; Collaert, N. ; Thean, A. V.Y. / Perspective of tunnel-FET for future low-power technology nodes. In: Technical Digest - International Electron Devices Meeting, IEDM. 2015 ; Vol. 2015-February, No. February. pp. 30.2.1-30.2.4.
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Verhulst, AS, Verreck, D, Smets, Q, Kao, K-H, Van De Put, M, Rooyackers, R, Sorée, B, Vandooren, A, De Meyer, K, Groeseneken, G, Heyns, MM, Mocuta, A, Collaert, N & Thean, AVY 2015, 'Perspective of tunnel-FET for future low-power technology nodes', Technical Digest - International Electron Devices Meeting, IEDM, vol. 2015-February, no. February, 7047140, pp. 30.2.1-30.2.4. https://doi.org/10.1109/IEDM.2014.7047140

Perspective of tunnel-FET for future low-power technology nodes. / Verhulst, A. S.; Verreck, D.; Smets, Q.; Kao, Kuo-Hsing; Van De Put, M.; Rooyackers, R.; Sorée, B.; Vandooren, A.; De Meyer, K.; Groeseneken, G.; Heyns, M. M.; Mocuta, A.; Collaert, N.; Thean, A. V.Y.

In: Technical Digest - International Electron Devices Meeting, IEDM, Vol. 2015-February, No. February, 7047140, 20.02.2015, p. 30.2.1-30.2.4.

Research output: Contribution to journalConference article

TY - JOUR

T1 - Perspective of tunnel-FET for future low-power technology nodes

AU - Verhulst, A. S.

AU - Verreck, D.

AU - Smets, Q.

AU - Kao, Kuo-Hsing

AU - Van De Put, M.

AU - Rooyackers, R.

AU - Sorée, B.

AU - Vandooren, A.

AU - De Meyer, K.

AU - Groeseneken, G.

AU - Heyns, M. M.

AU - Mocuta, A.

AU - Collaert, N.

AU - Thean, A. V.Y.

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N2 - Theoretically, confined heterostructure p(-n)-i-n (n(-p)-i-p) TFETs are promising candidates for future low-power applications, with n-TFET outperforming p-TFET. An optimal body thickness of about 10nm is predicted for Ga0.5As0.5Sb-In0.53Ga0.47As n-TFET with I60=20μA/μm. For p-TFETs, stronger confinement may be required to avoid tunneling to the heavy-hole band. An unexploited domain is the insertion of thin heterostructure slabs offering a locally reduced dielectric constant, enhancing both SS and Ion.

AB - Theoretically, confined heterostructure p(-n)-i-n (n(-p)-i-p) TFETs are promising candidates for future low-power applications, with n-TFET outperforming p-TFET. An optimal body thickness of about 10nm is predicted for Ga0.5As0.5Sb-In0.53Ga0.47As n-TFET with I60=20μA/μm. For p-TFETs, stronger confinement may be required to avoid tunneling to the heavy-hole band. An unexploited domain is the insertion of thin heterostructure slabs offering a locally reduced dielectric constant, enhancing both SS and Ion.

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JF - Technical Digest - International Electron Devices Meeting

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Verhulst AS, Verreck D, Smets Q, Kao K-H, Van De Put M, Rooyackers R et al. Perspective of tunnel-FET for future low-power technology nodes. Technical Digest - International Electron Devices Meeting, IEDM. 2015 Feb 20;2015-February(February):30.2.1-30.2.4. 7047140. https://doi.org/10.1109/IEDM.2014.7047140