Phase change memory modeling using verilog-A

Yi Bo Liao, Yan Kai Chen, Meng Hsueh Chiang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)

Abstract

In this paper, we successfully develop a compact phase change memory (PCM) model using Verilog-A. As PCM has shown its potential for next generation memory device, a predictive, yet simple-to-use circuit model is crucial to the development. Since the Verilog-A modeling is flexible and portable for many circuit simulators, the proposed modeling technique can be widely used, as compared with conventional modeling schemes.

Original languageEnglish
Title of host publication2007 IEEE International Behavioral Modeling and Simulation Workshop, BMAS
Pages159-164
Number of pages6
DOIs
Publication statusPublished - 2007 Dec 1
Event2007 IEEE International Behavioral Modeling and Simulation Workshop, BMAS - San Jose, CA, United States
Duration: 2007 Sep 202007 Sep 21

Publication series

Name2007 IEEE International Behavioral Modeling and Simulation Workshop, BMAS

Other

Other2007 IEEE International Behavioral Modeling and Simulation Workshop, BMAS
CountryUnited States
CitySan Jose, CA
Period07-09-2007-09-21

All Science Journal Classification (ASJC) codes

  • Computational Theory and Mathematics
  • Computer Science Applications
  • Computational Mechanics

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  • Cite this

    Liao, Y. B., Chen, Y. K., & Chiang, M. H. (2007). Phase change memory modeling using verilog-A. In 2007 IEEE International Behavioral Modeling and Simulation Workshop, BMAS (pp. 159-164). [4437544] (2007 IEEE International Behavioral Modeling and Simulation Workshop, BMAS). https://doi.org/10.1109/BMAS.2007.4437544