TY - JOUR
T1 - PLL control scheme for the electronic ballast with a current-equalization network
AU - Lin, Ray Lee
AU - Wen, Chien Hsin
N1 - Funding Information:
Manuscript received October 23, 2005; revised January 26, 2006. This work was sponsored by the National Science Council, Taiwan, under Award Number NSC 93-2213-E-006-138. The authors are with the Department of Electrical Engineering, National Cheng Kung University, Tainan City, Taiwan (e-mail: [email protected]. tw). Digital Object Identifier 10.1109/JDT.2006.872921
PY - 2006/6
Y1 - 2006/6
N2 - This paper proposes a phase-locked loop (PLL) control scheme for the electronic ballast with a current-equalization network. The PLL control scheme involves detecting the phase signals of both the resonant-tank input voltage and the two leakage-inductor terminals in the transformer; then the operating frequency of the circuit continuously tracks the resonant frequency as a reference frequency. Based on the tracked reference frequency, the required voltage gain of the resonant tank is regulated by offsetting the operating frequency. Consequently, the operating frequency is lower than the resonant frequency to ensure the zero-voltage-switching (ZVS) condition for less turn-on switching losses on the switches. This paper presents the analysis of the proposed PLL control scheme. Finally, the current-equalizing ability in the dimming range is demonstrated by experiments in order to validate and demonstrate the performance and feasibility of the proposed circuit.
AB - This paper proposes a phase-locked loop (PLL) control scheme for the electronic ballast with a current-equalization network. The PLL control scheme involves detecting the phase signals of both the resonant-tank input voltage and the two leakage-inductor terminals in the transformer; then the operating frequency of the circuit continuously tracks the resonant frequency as a reference frequency. Based on the tracked reference frequency, the required voltage gain of the resonant tank is regulated by offsetting the operating frequency. Consequently, the operating frequency is lower than the resonant frequency to ensure the zero-voltage-switching (ZVS) condition for less turn-on switching losses on the switches. This paper presents the analysis of the proposed PLL control scheme. Finally, the current-equalizing ability in the dimming range is demonstrated by experiments in order to validate and demonstrate the performance and feasibility of the proposed circuit.
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U2 - 10.1109/JDT.2006.872921
DO - 10.1109/JDT.2006.872921
M3 - Article
AN - SCOPUS:33744742304
SN - 1551-319X
VL - 2
SP - 160
EP - 169
JO - IEEE/OSA Journal of Display Technology
JF - IEEE/OSA Journal of Display Technology
IS - 2
ER -