@inproceedings{a3aea0d098594f8abfc429dfe74683e6,
title = "Power consumption ameliorated for integrated gate driver circuit with low frequency clock",
abstract = "This paper presents a novel low power consumption gate driver circuit with 12 TFTs and one capacitor which is made by hydrogenated amorphous silicon technology. The pull-down structure can not only prevent the floating of gate lines, but also suppress the threshold voltage shift of a-Si:H TFTs. According to the measurement results, the proposed gate driver circuit can be operated stably more than 10 days at high temperature (T = 100°C). Furthermore, the power consumption of the proposed gate driver circuit can be reduced 52.6% compared to the previously proposed gate driver circuit.",
author = "Lin, {Chih Lung} and Tu, {Chun Da} and Hung, {Chia Che} and Cheng, {Mao Hsun} and Wu, {Chia En} and Chen, {Yung Chih}",
year = "2011",
language = "English",
isbn = "9781618390967",
series = "49th Annual SID Symposium, Seminar, and Exhibition 2011, Display Week 2011",
pages = "1285--1287",
booktitle = "49th Annual SID Symposium, Seminar, and Exhibition 2011, Display Week 2011",
note = "49th Annual SID Symposium, Seminar, and Exhibition 2011, Display Week 2011 ; Conference date: 15-05-2011 Through 20-05-2011",
}